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Contents

Pinout
Key specifications
Electrical characteristics
CAD (KiCad official)
Provenance

README

markdown

CKS32F030R8T6

CKS · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)

CKS32F030R8T6 from CKS, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	VDD	power_in	Standard supply pin for the I/O and internal regulator, specified at 2.4 V to 3.6 V.
2	PC13	bidirectional	Powered through a power switch that sinks at most 3 mA, so output use is limited to 2 MHz at 30 pF and it must not source current such as LED drive; alternate functions include RTC_TAMP1, RTC_TS, RTC_OUT and WKUP2.
3	PC14/OSC32_IN	bidirectional	GPIO with the same power-switch limits as PC13 (3 mA sink, no current sourcing); this pin is the OSC32_IN input for the 32.768 kHz LSE crystal.
4	PC15/OSC32_OUT	bidirectional	GPIO with the same power-switch limits as PC13 (3 mA sink, no current sourcing); this pin is the OSC32_OUT output for the 32.768 kHz LSE crystal.
5	PF0/OSC_IN	bidirectional	FT (5 V tolerant) I/O that serves as OSC_IN for the 4 to 32 MHz high-speed external oscillator.
6	PF1/OSC_OUT	bidirectional	FT (5 V tolerant) I/O that serves as OSC_OUT for the 4 to 32 MHz high-speed external oscillator; it is also listed among pins with injection-current limits.
7	NRST	bidirectional	Active-low device reset input and internal reset output with an internal pull-up of 25 to 55 kΩ (40 kΩ typical).
8	PC0	bidirectional	TTa I/O (3.3 V tolerant, connected directly to the ADC) with EVENTOUT and ADC_IN10 functions.
9	PC1	bidirectional	TTa I/O (3.3 V tolerant, connected directly to the ADC) with EVENTOUT and ADC_IN11 functions.
10	PC2	bidirectional	TTa I/O (3.3 V tolerant, connected directly to the ADC) with EVENTOUT and ADC_IN12 functions.
11	PC3	bidirectional	TTa I/O (3.3 V tolerant, connected directly to the ADC) with EVENTOUT and ADC_IN13 functions.
12	VSSA	power_in	Analog ground for the ADC, reset block, RC oscillators and PLL.
13	VDDA	power_in	Analog supply for the ADC, reset block, RC oscillators and PLL, specified at 2.4 V to 3.6 V; it must be greater than or equal to VDD and powered up first.
14	PA0	bidirectional	TTa I/O with WKUP1 and RTC_TAMP2 functions and ADC_IN0, plus USART CTS alternate functions.
15	PA1	bidirectional	TTa I/O with ADC_IN1, EVENTOUT and USART RTS alternate functions.
16	PA2	bidirectional	TTa I/O with ADC_IN2, USART TX and TIM15_CH1 alternate functions.
17	PA3	bidirectional	TTa I/O with ADC_IN3, USART RX and TIM15_CH2 alternate functions.
18	PF4	bidirectional	FT (5 V tolerant) I/O with EVENTOUT as its listed function.
19	PF5	bidirectional	FT (5 V tolerant) I/O with EVENTOUT as its listed function.
20	PA4	bidirectional	TTa I/O with ADC_IN4, SPI1_NSS, USART1 CK and TIM14_CH1 alternate functions.
21	PA5	bidirectional	TTa I/O with ADC_IN5 and SPI1_SCK alternate function.
22	PA6	bidirectional	TTa I/O with ADC_IN6, SPI1_MISO, TIM3_CH1, TIM1_BKIN, TIM16_CH1 and EVENTOUT alternate functions.
23	PA7	bidirectional	TTa I/O with ADC_IN7, SPI1_MOSI, TIM3_CH2, TIM14_CH1, TIM1_CH1N, TIM17_CH1 and EVENTOUT alternate functions.
24	PC4	bidirectional	TTa I/O with ADC_IN14 and EVENTOUT as its listed functions.
25	PC5	bidirectional	TTa I/O with ADC_IN15 as its listed function.
26	PB0	bidirectional	TTa I/O with ADC_IN8, TIM3_CH3, TIM1_CH2N and EVENTOUT alternate functions.
27	PB1	bidirectional	TTa I/O with ADC_IN9, TIM3_CH4, TIM14_CH1 and TIM1_CH3N alternate functions.
28	PB2	bidirectional	FT (5 V tolerant) I/O with no alternate function listed; on the LQFP64 package this pin is a bonded, usable pin.
29	PB10	bidirectional	FT (5 V tolerant) I/O with I2C1_SCL (CKS32F030x6/x4 only) and I2C2_SCL (CKS32F030x8 only) alternate functions.
30	PB11	bidirectional	FT (5 V tolerant) I/O with I2C1_SDA (CKS32F030x6/x4 only), I2C2_SDA (CKS32F030x8 only) and EVENTOUT alternate functions.
31	VSS	power_in	Digital ground pin.
32	VDD	power_in	Digital supply pin, specified at 2.4 V to 3.6 V.
33	PB12	bidirectional	FT (5 V tolerant) I/O with SPI1_NSS (x6/x4 only), SPI2_NSS (x8 only), TIM1_BKIN and EVENTOUT alternate functions.
34	PB13	bidirectional	FT (5 V tolerant) I/O with SPI1_SCK (x6/x4 only), SPI2_SCK (x8 only) and TIM1_CH1N alternate functions.
35	PB14	bidirectional	FT (5 V tolerant) I/O with SPI1_MISO (x6/x4 only), the second SPI MISO function printed as SPI1_MISO(3) (x8 only), TIM1_CH2N and TIM15_CH1 (x8 only) alternate functions.
36	PB15	bidirectional	FT (5 V tolerant) I/O with SPI1_MOSI (x6/x4 only), SPI2_MOSI (x8 only), TIM1_CH3N, TIM15_CH1N and TIM15_CH2 (x8 only) and RTC_REFIN alternate or additional functions.
37	PC6	bidirectional	FT (5 V tolerant) I/O with TIM3_CH1 alternate function.
38	PC7	bidirectional	FT (5 V tolerant) I/O with TIM3_CH2 alternate function.
39	PC8	bidirectional	FT (5 V tolerant) I/O with TIM3_CH3 alternate function.
40	PC9	bidirectional	FT (5 V tolerant) I/O with TIM3_CH4 alternate function.
41	PA8	bidirectional	FT (5 V tolerant) I/O with USART1_CK, TIM1_CH1, EVENTOUT and MCO alternate functions.
42	PA9	bidirectional	FT (5 V tolerant) I/O with USART1_TX, TIM1_CH2, TIM15_BKIN (x8 only) and I2C1_SCL (x6/x4 only) alternate functions.
43	PA10	bidirectional	FT (5 V tolerant) I/O with USART1_RX, TIM1_CH3, TIM17_BKIN and I2C1_SDA (x6/x4 only) alternate functions.
44	PA11	bidirectional	FT (5 V tolerant) I/O with USART1_CTS, TIM1_CH4 and EVENTOUT alternate functions.
45	PA12	bidirectional	FT (5 V tolerant) I/O with USART1_RTS, TIM1_ETR and EVENTOUT alternate functions.
46	PA13	bidirectional	FT (5 V tolerant) I/O that is configured as SWDIO after reset with an internal pull-up enabled; also carries IR_OUT.
47	PF6	bidirectional	FT (5 V tolerant) I/O with I2C1_SCL (x6/x4 only) and I2C2_SCL (x8 only) alternate functions.
48	PF7	bidirectional	FT (5 V tolerant) I/O with I2C1_SDA (x6/x4 only) and I2C2_SDA (x8 only) alternate functions.
49	PA14	bidirectional	FT (5 V tolerant) I/O that is configured as SWCLK after reset with an internal pull-down enabled; also carries USART1_TX (x6/x4) and USART2_TX (x8) alternate functions.
50	PA15	bidirectional	FT (5 V tolerant) I/O with SPI1_NSS, USART1_RX (x6/x4), USART2_RX (x8) and EVENTOUT alternate functions.
51	PC10	bidirectional	FT (5 V tolerant) I/O with no alternate function listed in Table 10.
52	PC11	bidirectional	FT (5 V tolerant) I/O with no alternate function listed in Table 10.
53	PC12	bidirectional	FT (5 V tolerant) I/O with no alternate function listed in Table 10.
54	PD2	bidirectional	FT (5 V tolerant) I/O with no alternate function listed in Table 10.
55	PB3	bidirectional	FT (5 V tolerant) I/O with SPI1_SCK and EVENTOUT alternate functions.
56	PB4	bidirectional	FT (5 V tolerant) I/O with SPI1_MISO, TIM3_CH1 and EVENTOUT alternate functions.
57	PB5	bidirectional	FT (5 V tolerant) I/O with SPI1_MOSI, I2C1_SMBA, TIM16_BKIN and TIM3_CH2 alternate functions.
58	PB6	bidirectional	FTf I/O (5 V tolerant, FM+ capable with 20 mA sink) with I2C1_SCL, USART1_TX and TIM16_CH1N alternate functions.
59	PB7	bidirectional	FTf I/O (5 V tolerant, FM+ capable with 20 mA sink) with I2C1_SDA, USART1_RX and TIM17_CH1N alternate functions.
60	BOOT0	input	Boot memory selection input that is input-only and must be pulled high or low externally, never left floating; its input range is 0 to 5.5 V.
61	PB8	bidirectional	FTf I/O (5 V tolerant, FM+ capable) with I2C1_SCL and TIM16_CH1 alternate functions.
62	PB9	bidirectional	FTf I/O (5 V tolerant, FM+ capable) with I2C1_SDA, IR_OUT, TIM17_CH1 and EVENTOUT alternate functions.
63	VSS	power_in	Digital ground pin.
64	VDD	power_in	Digital supply pin, specified at 2.4 V to 3.6 V.

Key specifications

Parameter	Value
Manufacturer	CKS
Package	LQFP-64(10x10)
Category	Embedded Processors & Controllers
Pins	64

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Max	Unit	Conditions	Page
Digital supply voltage	VDD	2.4	3.6	V	Feature summary (p.1): 2.4~3.6V digital VDD supply	1
Analog supply voltage	VDDA		3.6	V	Feature summary (p.1): analog VDDA supply, stated as VDD to 3.6V; separate 2.4-3.6V analog supply for ADC	1
ADC conversion voltage range		0	3.6	V	Feature summary (p.1): 12-bit ADC, 1.0 us, conversion range 0~3.6V	1
External crystal oscillator frequency		4	32	MHz	Feature summary (p.1): 4 to 32MHz crystal oscillator	1
CPU maximum frequency			48	MHz	Feature summary (p.1): M0 core frequency up to 48MHz	1

CAD (KiCad official)

Symbol: CKS32F030R8T6
Footprint: Package_QFP:LQFP-64_10x10mm_P0.5mm
3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
3D model files: cks32f030r8t6-etched.step / cks32f030r8t6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cks32f030r8t6.step / cks32f030r8t6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: CKS datasheet (78 pp, sha256 719ccdac6b1ec804, retrieved 2026-10-20, tier: lcsc)
Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF