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CKS32F030C8T6

CKS · Other Processors and Microcontrollers (MCUs) · LQFP-48(7x7)

CKS32F030C8T6 from CKS, in a LQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VDD power_in Digital power supply, 2.4 to 3.6 V.
2 PC13 bidirectional TC I/O powered through a switch limited to 3 mA, so output speed is limited to 2 MHz with 30 pF max load and it cannot drive LEDs; functions RTC_TAMP1, RTC_TS, RTC_OUT, WKUP2.
3 PC14/OSC32_IN bidirectional TC I/O with 3 mA switch-limited output; additional function OSC32_IN for the 32.768 kHz oscillator.
4 PC15/OSC32_OUT bidirectional TC I/O with 3 mA switch-limited output; additional function OSC32_OUT for the 32.768 kHz oscillator.
5 PF0/OSC_IN bidirectional 5 V tolerant I/O with additional function OSC_IN for the 4-32 MHz oscillator.
6 PF1/OSC_OUT bidirectional 5 V tolerant I/O with additional function OSC_OUT for the 4-32 MHz oscillator.
7 NRST bidirectional Active-low device reset input / internal reset output with weak pull-up.
8 VSSA power_in Analog ground.
9 VDDA power_in Analog supply, 2.4 to 3.6 V, must be greater than or equal to VDD.
10 PA0 bidirectional TTa I/O with USART1_CTS/USART2_CTS, ADC_IN0, RTC_TAMP2, WKUP1.
11 PA1 bidirectional TTa I/O with USART1_RTS/USART2_RTS, EVENTOUT, ADC_IN1.
12 PA2 bidirectional TTa I/O with USART1_TX/USART2_TX, TIM15_CH1, ADC_IN2.
13 PA3 bidirectional TTa I/O with USART1_RX/USART2_RX, TIM15_CH2, ADC_IN3.
14 PA4 bidirectional TTa I/O with SPI1_NSS, USART1_CK, TIM14_CH1, ADC_IN4.
15 PA5 bidirectional TTa I/O with SPI1_SCK, ADC_IN5.
16 PA6 bidirectional TTa I/O with SPI1_MISO, TIM3_CH1, TIM1_BKIN, TIM16_CH1, EVENTOUT, ADC_IN6.
17 PA7 bidirectional TTa I/O with SPI1_MOSI, TIM3_CH2, TIM14_CH1, TIM1_CH1N, TIM17_CH1, EVENTOUT, ADC_IN7.
18 PB0 bidirectional TTa I/O with TIM3_CH3, TIM1_CH2N, EVENTOUT, ADC_IN8.
19 PB1 bidirectional TTa I/O with TIM3_CH4, TIM14_CH1, TIM1_CH3N, ADC_IN9.
20 PB2 bidirectional 5 V tolerant general-purpose I/O.
21 PB10 bidirectional 5 V tolerant I/O with I2C1_SCL (x6/x4 parts) or I2C2_SCL (x8 parts).
22 PB11 bidirectional 5 V tolerant I/O with I2C1_SDA (x6/x4 parts) or I2C2_SDA (x8 parts), EVENTOUT.
23 VSS power_in Digital ground.
24 VDD power_in Digital power supply, 2.4 to 3.6 V.
25 PB12 bidirectional 5 V tolerant I/O with SPI1_NSS/SPI2_NSS, TIM1_BKIN, EVENTOUT.
26 PB13 bidirectional 5 V tolerant I/O with SPI1_SCK/SPI2_SCK, TIM1_CH1N.
27 PB14 bidirectional 5 V tolerant I/O with SPI MISO, TIM1_CH2N, TIM15_CH1.
28 PB15 bidirectional 5 V tolerant I/O with SPI MOSI, TIM1_CH3N, TIM15_CH1N, TIM15_CH2, RTC_REFIN.
29 PA8 bidirectional 5 V tolerant I/O with USART1_CK, TIM1_CH1, EVENTOUT, MCO.
30 PA9 bidirectional 5 V tolerant I/O with USART1_TX, TIM1_CH2, TIM15_BKIN, I2C1_SCL.
31 PA10 bidirectional 5 V tolerant I/O with USART1_RX, TIM1_CH3, TIM17_BKIN, I2C1_SDA.
32 PA11 bidirectional 5 V tolerant I/O with USART1_CTS, TIM1_CH4, EVENTOUT.
33 PA12 bidirectional 5 V tolerant I/O with USART1_RTS, TIM1_ETR, EVENTOUT.
34 PA13 bidirectional 5 V tolerant I/O, SWDIO after reset with internal pull-up; also IR_OUT.
35 PF6 bidirectional 5 V tolerant I/O with I2C1_SCL/I2C2_SCL.
36 PF7 bidirectional 5 V tolerant I/O with I2C1_SDA/I2C2_SDA.
37 PA14 bidirectional 5 V tolerant I/O, SWCLK after reset with internal pull-down; also USART1_TX/USART2_TX.
38 PA15 bidirectional 5 V tolerant I/O with SPI1_NSS, USART1_RX/USART2_RX, EVENTOUT.
39 PB3 bidirectional 5 V tolerant I/O with SPI1_SCK, EVENTOUT.
40 PB4 bidirectional 5 V tolerant I/O with SPI1_MISO, TIM3_CH1, EVENTOUT.
41 PB5 bidirectional 5 V tolerant I/O with SPI1_MOSI, I2C1_SMBA, TIM16_BKIN, TIM3_CH2.
42 PB6 bidirectional 5 V tolerant FM+ capable I/O with I2C1_SCL, USART1_TX, TIM16_CH1N.
43 PB7 bidirectional 5 V tolerant FM+ capable I/O with I2C1_SDA, USART1_RX, TIM17_CH1N.
44 BOOT0 input Boot memory selection input; must be pulled high or low externally and cannot float.
45 PB8 bidirectional 5 V tolerant FM+ capable I/O with I2C1_SCL, TIM16_CH1.
46 PB9 bidirectional 5 V tolerant FM+ capable I/O with I2C1_SDA, IR_OUT, TIM17_CH1, EVENTOUT.
47 VSS power_in Digital ground.
48 VDD power_in Digital power supply, 2.4 to 3.6 V.

Key specifications

Parameter Value
Manufacturer CKS
Package LQFP-48(7x7)
Category Embedded Processors & Controllers
Pins 48

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Digital supply voltage VDD 2.4 3.6 V 1
Analog supply voltage VDDA 2.4 3.6 V Feature list: VDDA from VDD to 3.6V; separate 2.4 to 3.6V analog supply 1
CPU frequency 48 MHz M0 CPU, up to 48MHz 1
ADC conversion range 0 3.6 V 12-bit ADC 1

CAD (KiCad official)

  • Symbol: CKS32F030C8T6
  • Footprint: Package_QFP:LQFP-48_7x7mm_P0.5mm
  • 3D model: LQFP-48(7x7) (KiCad packages3D, STEP)
  • 3D model files: cks32f030c8t6-etched.step / cks32f030c8t6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cks32f030c8t6.step / cks32f030c8t6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: CKS datasheet (78 pp, sha256 719ccdac6b1ec804, retrieved 2026-10-23, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF