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CJU30P10

Changjing · MOSFETs · TO-252-2L

CJU30P10 from Changjing, in a TO-252-2L. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GATE input Gate terminal of the P-channel MOSFET; the datasheet limits gate-source voltage VGS to ±20 V.
2 DRAIN passive Drain terminal of the MOSFET; the datasheet rates drain-source voltage VDS at -100 V and continuous drain current at -30 A.
3 SOURCE passive Source terminal of the MOSFET, the reference for gate-source voltage (VGS limit ±20 V).

Key specifications

Parameter Value
Manufacturer Changjing
Package TO-252-2L
Category Transistors/Thyristors
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Voltage VDS -100 V 1
Gate-Source Voltage VGS -20 20 V 1
Continuous Drain Current ID -30 A 1
Pulsed Drain Current IDM -120 A 1
Single Pulsed Avalanche Energy EAS 240 mJ 1
Junction Temperature and Storage Temperature Range TJ Tstg -55 150 ℃ 1
Thermal Resistance from Junction to Ambient RθJA 100 ℃/W 1
Drain-source breakdown voltage V(BR)DSS -100 V VGS = 0V, ID =-250µA 2
Gate-body leakage current IGSS -100 100 nA VDS =0V, VGS =±20V 2
Gate-threshold voltage VGS(th) -1 -1.5 -2.5 V VDS =VGS, ID =-250µA 2
Static drain-source on-state resistance RDS(on) 38 45 mΩ VGS =-10V, ID =-15A 2
Static drain-source on-state resistance RDS(on) 41 55 mΩ VGS =-4.5V, ID =-15A 2
Zero gate voltage drain current (TJ=25℃) IDSS -1 µA VDS =-80V, VGS =0V, TJ =25℃ 2
Zero gate voltage drain current (TJ=125℃) IDSS -100 µA VDS =-80V, VGS =0V, TJ =125℃ 2
Drain-source diode forward voltage VSD -1.2 V VGS =0V 2
Continuous drain-source diode forward current IS -30 A 2
Pulsed drain-source diode forward current ISM -120 A 2
Input capacitance Ciss 6315 pF VDS =-20V, VGS =0V, f =1MHz 2
Output capacitance Coss 220 pF VDS =-20V, VGS =0V, f =1MHz 2
Reverse transfer capacitance Crss 50 pF VDS =-20V, VGS =0V, f =1MHz 2
Total gate charge Qg 98 nC VDS=-20V, VGS=-10V, ID=-12A 2
Gate-source charge Qgs 16.2 nC VDS=-20V, VGS=-10V, ID=-12A 2
Gate-drain charge Qgd 13.8 nC VDS=-20V, VGS=-10V, ID=-12A 2
Turn-on delay time td(on) 10 ns VDD=-20V, VGS=-10V, RG=3Ω, ID=-20A 2
Turn-on rise time tr 18 ns VDD=-20V, VGS=-10V, RG=3Ω, ID=-20A 2
Turn-off delay time td(off) 38 ns VDD=-20V, VGS=-10V, RG=3Ω, ID=-20A 2
Turn-off fall time tf 24 ns VDD=-20V, VGS=-10V, RG=3Ω, ID=-20A 2
Gate resistance Rg 5.7 Ω f =1MHz 2

CAD (KiCad official)

  • Symbol: CJU30P10
  • Footprint: Package_TO_SOT_SMD:TO-252-2
  • 3D model: TO-252-2L (KiCad packages3D, STEP)
  • 3D model files: cju30p10-etched.step / cju30p10-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cju30p10.step / cju30p10.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Changjing datasheet (5 pp, sha256 62beaf5a0de91e09, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF