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CJQ4406A

Changjing · MOSFETs · SOP-8

CJQ4406A from Changjing, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S passive Source terminal of the N-channel MOSFET, with VGS limited to ±20 V and continuous drain current rated 10 A.
2 S passive Source terminal of the N-channel MOSFET, with VGS limited to ±20 V and continuous drain current rated 10 A.
3 S passive Source terminal of the N-channel MOSFET, with VGS limited to ±20 V and continuous drain current rated 10 A.
4 G input Gate terminal of the N-channel MOSFET, with gate-source voltage limited to ±20 V and a threshold of 1.0 V min to 3.0 V max at 250 µA.
5 D passive Drain terminal of the N-channel MOSFET, rated 30 V drain-source, 10 A continuous and 40 A pulsed.
6 D passive Drain terminal of the N-channel MOSFET, rated 30 V drain-source, 10 A continuous and 40 A pulsed.
7 D passive Drain terminal of the N-channel MOSFET, rated 30 V drain-source, 10 A continuous and 40 A pulsed.
8 D passive Drain terminal of the N-channel MOSFET, rated 30 V drain-source, 10 A continuous and 40 A pulsed.

Key specifications

Parameter Value
Manufacturer Changjing
Package SOP-8
Category Transistors/Thyristors
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Voltage VDS 30 V 1
Gate-Source Voltage VGS -20 20 V 1
Continuous Drain Current ID 10 A 1
Pulsed Drain Current IDM 40 A 1
Single Pulsed Avalanche Energy EAS 70 mJ 1
Power Dissipation PD 2.5 W 1
Operating Junction and Storage Temperature Range TJ,TSTG -55 150 ℃ 1
Thermal Resistance from Junction to Ambient RθJA 50 ℃/W 1
Drain-source breakdown voltage V(BR)DSS 30 V VGS = 0V, ID =250uA 2
Zero gate voltage drain current IDSS 1 µA VDS =30V, VGS =0V 2
Gate-body leakage current IGSS -100 100 nA VDS =0V, VGS =±20V 2
Gate-threshold voltage VGS(th) 1 2 3 V VDS =VGS, ID =250µA 2
Static drain-source on-state resistance RDS(on) 8.3 mΩ VGS =10V, ID =10A 2
Static drain-source on-state resistance RDS(on) 10.8 15 mΩ VGS =4.5V, ID =5A 2
Input capacitance Ciss 1280 pF VDS =15V, VGS =0V, f =1MHz 2
Output capacitance Coss 177 pF VDS =15V, VGS =0V, f =1MHz 2
Reverse transfer capacitance Crss 121 pF VDS =15V, VGS =0V, f =1MHz 2
Gate resistance Rg 4.9 Ω f =1MHz 2
Total gate charge Qg 10.7 nC VGS=10V, VDS=15V, ID=10A 2
Gate-source charge Qgs 3.8 nC VGS=10V, VDS=15V, ID=10A 2
Gate-drain charge Qgd 4.1 nC VGS=10V, VDS=15V, ID=10A 2
Turn-on delay time td(on) 30 ns VDS=15V, VGS=10V, RL=5.26Ω, Rg=10Ω 2
Turn-on rise time tr 20 ns VDS=15V, VGS=10V, RL=5.26Ω, Rg=10Ω 2
Turn-off delay time td(off) 156 ns VDS=15V, VGS=10V, RL=5.26Ω, Rg=10Ω 2
Turn-off fall time tf 60 ns VDS=15V, VGS=10V, RL=5.26Ω, Rg=10Ω 2
Drain-source diode forward voltage VSD 1.2 V VGS =0V, IS=10A 2
Continuous drain-source diode forward current IS 10 A 2
Pulsed drain-source diode forward current ISM 40 A 2

CAD (KiCad official)

  • Symbol: CJQ4406A
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: cjq4406a-etched.step / cjq4406a-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cjq4406a.step / cjq4406a.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Changjing datasheet (7 pp, sha256 bb0394cf37cb3a93, retrieved 2026-10-28, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF