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cje3134k-etched.glb cje3134k: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
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README.md Initial commit: component/cje3134k · Ray 4d ago

CJE3134K

Changjing · MOSFETs · SOT-523

CJE3134K from Changjing, in a SOT-523. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GATE input Gate control terminal with ±12V maximum rating and 0.35-1.1V threshold voltage at ID=250µA.
2 SOURCE passive Source terminal serving as gate voltage reference and common drain current return path.
3 DRAIN passive Drain terminal rated 20V maximum voltage and 0.75A continuous drain current.

Key specifications

Parameter Value
Manufacturer Changjing
Package SOT-523
Category Transistors/Thyristors
Pins 3

CAD (KiCad official)

  • Symbol: CJE3134K
  • Footprint: Package_TO_SOT_SMD:SOT-523
  • 3D model: SOT-523, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 0.8 mm nominal SOT-523 height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
  • 3D model files: cje3134k-etched.step / cje3134k-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cje3134k.step / cje3134k.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Changjing datasheet (5 pp, sha256 eb3d938b9ac47612, retrieved 2026-10-01, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF