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CJC6811A
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ESHINE Microcontroller Units (MCUs/MPUs/SOCs), QFN-32(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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CJC6811A
ESHINE · Microcontroller Units (MCUs/MPUs/SOCs) · QFN-32(5x5)
CJC6811A from ESHINE, in a QFN-32(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model). Symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | UART_TX | bidirectional | UART transmitter, also available as GPIO6. |
| 2 | FLS_SO | bidirectional | SPI data output for boot flash. |
| 3 | MCU_SPIB_SO | bidirectional | MCU SPI data output for boot flash (diagram label SPIB_SO). |
| 4 | MCU_SPIB_CSN | bidirectional | MCU SPI chip select for boot flash. |
| 5 | FLS_SI | bidirectional | SPI data line for boot flash; the table comment says data out, which conflicts with the pin name. |
| 6 | VDD33 | power_in | Power supply for IO; the IO voltage is taken from VDD33 and can range from 2.8V to 3.6V. |
| 7 | SPIB_CLK | bidirectional | SPI clock for boot flash (diagram label SPIB_SCK). |
| 8 | SPIB_SI | bidirectional | SPI data input for boot flash. |
| 9 | DVDD18 | power_out | 1.8V regulator output for IO, normally 2.2V as stated in the table. |
| 10 | GPIO3 | bidirectional | General-purpose IO GPIO3. |
| 11 | CLK_XTALa | bidirectional | 12MHz oscillator input, default not connected. |
| 12 | FLS_VDD33 | power_in | Power supply for IO on the flash interface. |
| 13 | BOOTMODE | bidirectional | Boot mode select, default tied to VDD33. |
| 14 | GPIO0 | bidirectional | General-purpose IO GPIO0, also the PWM output. |
| 15 | GPIO2 | bidirectional | General-purpose IO GPIO2. |
| 16 | VDD33 | power_in | Power supply for IO. |
| 17 | VSSIO0 | power_in | Ground for IO. |
| 18 | AVDD | power_in | Power supply for analog circuits except the headphone driver. |
| 19 | AVDD_HP | power_in | Power supply for the headphone analog circuits. |
| 20 | MIC_BIAS | output | Microphone bias output. |
| 21 | MIC_IN | input | Microphone input. |
| 22 | ADC_IN | input | ADC analog input (one channel). |
| 23 | RESETB | bidirectional | Chip reset, active low. |
| 24 | PGND | power_in | Ground for analog circuits. |
| 25 | HP_L | output | Left headphone output. |
| 26 | HP_VCOM | output | Headphone voltage reference. |
| 27 | HP_R | output | Right headphone output. |
| 28 | Codec_Vmid | output | Codec voltage reference. |
| 29 | DVDD18 | power_out | 1.8V regulator output for IO, normally 2.2V as stated in the table. |
| 30 | USB_DM | bidirectional | USB D- data line. |
| 31 | USB_DP | bidirectional | USB D+ data line. |
| 32 | DVDD33 | power_in | Power supply for the USB PHY. |
| 33 | GND/VSS | power_in | Digital ground; likely the exposed pad, shown as the centre ground in the diagram. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | ESHINE |
| Package | QFN-32(5x5) |
| Category | Single Chip Microcomputer/Microcontroller |
| Pins | 33 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Digital supply range (Core) | AVDD_HP | 2.8 | 3.3 | 3.6 | V | 9 | |
| Digital supply range (Buffer) | VDD33 | 8.8 | 3.3 | 3.6 | V | 9 | |
| Analogue supply range | AVDD | 2.8 | 3.3 | 3.6 | V | 9 | |
| Ground | GND,PGND,VSSIO0 | 0 | V | 9 | |||
| Digital supply voltage | -0.3 | 3.6 | V | 8 | |||
| Analogue supply voltage | -0.3 | 3.6 | V | 8 | |||
| Voltage range digital inputs | -0.3 | V | VSSIO0 | 8 | |||
| Voltage range analogue inputs | -0.3 | V | GND | 8 | |||
| Operating temperature range | TA | -40 | 85 | °C | 8 |
CAD (KiCad official)
- Symbol:
CJC6811A - Footprint:
Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm - 3D model: QFN-32(5x5) (KiCad packages3D, STEP)
- 3D model files:
cjc6811a-etched.step/cjc6811a-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cjc6811a.step/cjc6811a.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: ESHINE datasheet (91 pp, sha256
e1df8708ea3c5f2a, retrieved 2026-11-12, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# CJC6811A
**ESHINE** · Microcontroller Units (MCUs/MPUs/SOCs) · QFN-32(5x5)
CJC6811A from ESHINE, in a QFN-32(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model). Symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | UART_TX | bidirectional | UART transmitter, also available as GPIO6. |
| 2 | FLS_SO | bidirectional | SPI data output for boot flash. |
| 3 | MCU_SPIB_SO | bidirectional | MCU SPI data output for boot flash (diagram label SPIB_SO). |
| 4 | MCU_SPIB_CSN | bidirectional | MCU SPI chip select for boot flash. |
| 5 | FLS_SI | bidirectional | SPI data line for boot flash; the table comment says data out, which conflicts with the pin name. |
| 6 | VDD33 | power_in | Power supply for IO; the IO voltage is taken from VDD33 and can range from 2.8V to 3.6V. |
| 7 | SPIB_CLK | bidirectional | SPI clock for boot flash (diagram label SPIB_SCK). |
| 8 | SPIB_SI | bidirectional | SPI data input for boot flash. |
| 9 | DVDD18 | power_out | 1.8V regulator output for IO, normally 2.2V as stated in the table. |
| 10 | GPIO3 | bidirectional | General-purpose IO GPIO3. |
| 11 | CLK_XTALa | bidirectional | 12MHz oscillator input, default not connected. |
| 12 | FLS_VDD33 | power_in | Power supply for IO on the flash interface. |
| 13 | BOOTMODE | bidirectional | Boot mode select, default tied to VDD33. |
| 14 | GPIO0 | bidirectional | General-purpose IO GPIO0, also the PWM output. |
| 15 | GPIO2 | bidirectional | General-purpose IO GPIO2. |
| 16 | VDD33 | power_in | Power supply for IO. |
| 17 | VSSIO0 | power_in | Ground for IO. |
| 18 | AVDD | power_in | Power supply for analog circuits except the headphone driver. |
| 19 | AVDD_HP | power_in | Power supply for the headphone analog circuits. |
| 20 | MIC_BIAS | output | Microphone bias output. |
| 21 | MIC_IN | input | Microphone input. |
| 22 | ADC_IN | input | ADC analog input (one channel). |
| 23 | RESETB | bidirectional | Chip reset, active low. |
| 24 | PGND | power_in | Ground for analog circuits. |
| 25 | HP_L | output | Left headphone output. |
| 26 | HP_VCOM | output | Headphone voltage reference. |
| 27 | HP_R | output | Right headphone output. |
| 28 | Codec_Vmid | output | Codec voltage reference. |
| 29 | DVDD18 | power_out | 1.8V regulator output for IO, normally 2.2V as stated in the table. |
| 30 | USB_DM | bidirectional | USB D- data line. |
| 31 | USB_DP | bidirectional | USB D+ data line. |
| 32 | DVDD33 | power_in | Power supply for the USB PHY. |
| 33 | GND/VSS | power_in | Digital ground; likely the exposed pad, shown as the centre ground in the diagram. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | ESHINE |
| Package | QFN-32(5x5) |
| Category | Single Chip Microcomputer/Microcontroller |
| Pins | 33 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Digital supply range (Core) | AVDD_HP | 2.8 | 3.3 | 3.6 | V | | 9 |
| Digital supply range (Buffer) | VDD33 | 8.8 | 3.3 | 3.6 | V | | 9 |
| Analogue supply range | AVDD | 2.8 | 3.3 | 3.6 | V | | 9 |
| Ground | GND,PGND,VSSIO0 | | 0 | | V | | 9 |
| Digital supply voltage | | -0.3 | | 3.6 | V | | 8 |
| Analogue supply voltage | | -0.3 | | 3.6 | V | | 8 |
| Voltage range digital inputs | | -0.3 | | | V | VSSIO0 | 8 |
| Voltage range analogue inputs | | -0.3 | | | V | GND | 8 |
| Operating temperature range | TA | -40 | | 85 | °C | | 8 |
## CAD (KiCad official)
- Symbol: `CJC6811A`
- Footprint: `Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm`
- 3D model: QFN-32(5x5) (KiCad packages3D, STEP)
- 3D model files: `cjc6811a-etched.step` / `cjc6811a-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `cjc6811a.step` / `cjc6811a.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [ESHINE datasheet](docs/cjc6811a-datasheet.pdf) (91 pp, sha256 `e1df8708ea3c5f2a`, retrieved 2026-11-12, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/cjc6811a-datasheet.pdf)