CJC1808

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  "slug": "cjc1808",
  "title": "CJC1808",
  "brief": "ESHINE Analog To Digital Converters (ADC), TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.1.0",
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    "mpn": "CJC1808",
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    "package": "TSSOP-14",
    "pin_count": 14,
    "category": "Data Acquisition",
    "subcategory": "Analog To Digital Converters (ADC)",
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    "distributor_links": {
      "lcsc": "C7431494"
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      "digikey": {
        "pn": null,
        "status": "quota"
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      "mouser": {
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    "pins": [
      {
        "number": "1",
        "name": "VREF",
        "type": "power_in",
        "description": "Reference-voltage decoupling pin held at 1/2 VCC (center voltage 0.5 VCC), to be bypassed to AGND with 0.1 µF ceramic and 10 µF electrolytic capacitors placed as close to the pin as possible."
      },
      {
        "number": "2",
        "name": "AGND",
        "type": "power_in",
        "description": "Analog ground, which must be tied directly to DGND under the package with low impedance to limit digital noise feeding into the analog ground."
      },
      {
        "number": "3",
        "name": "VCC",
        "type": "power_in",
        "description": "Analog power supply at 3.3 V nominal, with a recommended range of 2.7 V to 5.5 V and an absolute maximum of 5.5 V."
      },
      {
        "number": "4",
        "name": "VDD",
        "type": "power_in",
        "description": "Digital power supply at 3.3 V nominal, with a recommended range of 2.7 V to 3.6 V and an absolute maximum of 4 V."
      },
      {
        "number": "5",
        "name": "DGND",
        "type": "power_in",
        "description": "Digital ground, which must be tied directly to AGND under the package with low impedance to reduce noise coupling."
      },
      {
        "number": "6",
        "name": "SCKI",
        "type": "input",
        "description": "System clock input that must be 256 fs, 384 fs or 512 fs (2.048 MHz to 49.152 MHz), with CMOS input levels of VIH 2 V min and VIL 0.8 V max and an absolute maximum of 5.5 V."
      },
      {
        "number": "7",
        "name": "LRCK",
        "type": "bidirectional",
        "description": "Audio-data latch-enable (word clock) that is an input in slave mode and an output in master mode, operating over sampling rates of 8 kHz to 96 kHz."
      },
      {
        "number": "8",
        "name": "BCK",
        "type": "bidirectional",
        "description": "Audio bit clock that is an input in slave mode (64 or 48 BCK per frame) and an output in master mode at 64 BCK per frame."
      },
      {
        "number": "9",
        "name": "DOUT",
        "type": "output",
        "description": "Audio-data digital output (MSB-first, 2's complement) with VOH of 2.8 V min at -4 mA and VOL of 0.5 V max at 4 mA, and a recommended load capacitance of 20 pF; it is forced to zero during clock-halt reset."
      },
      {
        "number": "10",
        "name": "MD0",
        "type": "input",
        "description": "Audio-interface mode select bit 0, which together with MD1 selects slave or master mode and the system clock ratio per Table 2 and must be set before power-on; digital input with VIH 2 V min and VIL 0.8 V max."
      },
      {
        "number": "11",
        "name": "MD1",
        "type": "input",
        "description": "Audio-interface mode select bit 1, which together with MD0 selects slave or master mode and the system clock ratio per Table 2 and must be set before power-on; digital input with VIH 2 V min and VIL 0.8 V max."
      },
      {
        "number": "12",
        "name": "FMT",
        "type": "input",
        "description": "Audio-interface format select, where Low selects I2S 24-bit and High selects left-justified 24-bit; digital input with VIH 2 V min and VIL 0.8 V max."
      },
      {
        "number": "13",
        "name": "VINL",
        "type": "input",
        "description": "Single-ended analog input for the left channel, with full scale of 1.98 Vpp (0 dB), an input range of 0.6 VCC Vpp, and an absolute maximum of -0.3 V to (VCC + 0.3 V) and below 5.5 V."
      },
      {
        "number": "14",
        "name": "VINR",
        "type": "input",
        "description": "Single-ended analog input for the right channel, with full scale of 1.98 Vpp (0 dB), an input range of 0.6 VCC Vpp, and an absolute maximum of -0.3 V to (VCC + 0.3 V) and below 5.5 V."
      }
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    "specs": {
      "Manufacturer": "ESHINE",
      "Package": "TSSOP-14",
      "Category": "Data Acquisition",
      "Pins": "14"
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        {
          "name": "Pass-band ripple",
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