component
CJA9451
Public Made by Adomby adom
Changjing MOSFETs, SOT-89-3L. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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cja9451: specified limits as data (metadata.characteristics, 22 rows from the datasheet)
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23d ago
CJA9451
Changjing · MOSFETs · SOT-89-3L
CJA9451 from Changjing, in a SOT-89-3L. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GATE | input | Gate terminal; the datasheet rates the continuous gate-source voltage at ±12 V and the gate-threshold voltage at −0.50 V to −1.50 V (VDS = VGS, ID = −0.25 mA). |
| 2 | DRAIN | passive | Drain terminal; rated for a drain-source voltage VDS of −20 V and a continuous drain current ID of −2.3 A. |
| 3 | SOURCE | passive | Source terminal, the reference for the rated gate-source voltage of ±12 V; the datasheet gives no separate pin-specific limit for it. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Changjing |
| Package | SOT-89-3L |
| Category | Transistors/Thyristors |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Voltage | VDS | -20 | V | 1 | |||
| Continuous Gate-Source Voltage | VGS | -12 | 12 | V | 1 | ||
| Continuous Drain Current | ID | -2.3 | A | 1 | |||
| Power Dissipation | PD | 0.5 | W | 1 | |||
| Operating Temperature | Tj | 150 | ℃ | 1 | |||
| Storage Temperature | Tstg | -55 | 150 | ℃ | 1 | ||
| Thermal Resistance from Junction to Ambient | RθJA | 250 | ℃/W | 1 | |||
| Drain-source breakdown voltage | V(BR)DSS | -20 | V | VGS = 0V, ID =10µA | 2 | ||
| Gate-body leakage | IGSS | -100 | 100 | nA | VDS =0V, VGS =±12V | 2 | |
| Zero gate voltage drain current | IDSS | -1 | µA | VDS =-20V, VGS =0V | 2 | ||
| Gate-threshold voltage | VGS(th) | -0.5 | -1.5 | V | VDS =VGS, ID =-0.25mA | 2 | |
| Static drain-source on-resistance (note 1) | RDS(on) | 0.135 | Ω | VGS =-4.5V, ID =-2.3A | 2 | ||
| Static drain-source on-resistance (note 1) | RDS(on) | 0.24 | Ω | VGS =-2.5V, ID =-1.0A | 2 | ||
| Forward transconductance (note 1) | gfs | 2.3 | S | VDS =-5V, ID =-2.3A | 2 | ||
| Input capacitance | Ciss | 430 | pF | VDS =-20V,VGS =0V, f=1MHz | 2 | ||
| Output capacitance | Coss | 100 | pF | VDS =-20V,VGS =0V, f=1MHz | 2 | ||
| Reverse transfer capacitance | Crss | 35 | pF | VDS =-20V,VGS =0V, f=1MHz | 2 | ||
| Turn-on delay time (note 1,2) | td(on) | 9 | ns | VGS=-5V, VDS=-10V, ID =-1A,RG=3.3Ω, RD=10Ω | 2 | ||
| Rise time (note 2) | tr | 25 | ns | VGS=-5V, VDS=-10V, ID =-1A,RG=3.3Ω, RD=10Ω | 2 | ||
| Turn-off delay time (note 2) | td(off) | 20 | ns | VGS=-5V, VDS=-10V, ID =-1A,RG=3.3Ω, RD=10Ω | 2 | ||
| Fall time (note 2) | tf | 10 | ns | VGS=-5V, VDS=-10V, ID =-1A,RG=3.3Ω, RD=10Ω | 2 | ||
| Body diode forward voltage (note 1) | VSD | -1.6 | V | IS=-1A, VGS = 0V | 2 |
CAD (KiCad official)
- Symbol:
CJA9451 - Footprint:
Package_TO_SOT_SMD:SOT-89-3 - 3D model: SOT-89-3L (KiCad packages3D, STEP)
- 3D model files:
cja9451-etched.step/cja9451-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cja9451.step/cja9451.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Changjing datasheet (3 pp, sha256
4f74d6428ac43e17, retrieved 2026-10-09, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# CJA9451
**Changjing** · MOSFETs · SOT-89-3L
CJA9451 from Changjing, in a SOT-89-3L. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GATE | input | Gate terminal; the datasheet rates the continuous gate-source voltage at ±12 V and the gate-threshold voltage at −0.50 V to −1.50 V (VDS = VGS, ID = −0.25 mA). |
| 2 | DRAIN | passive | Drain terminal; rated for a drain-source voltage VDS of −20 V and a continuous drain current ID of −2.3 A. |
| 3 | SOURCE | passive | Source terminal, the reference for the rated gate-source voltage of ±12 V; the datasheet gives no separate pin-specific limit for it. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Changjing |
| Package | SOT-89-3L |
| Category | Transistors/Thyristors |
| Pins | 3 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Voltage | VDS | | | -20 | V | | 1 |
| Continuous Gate-Source Voltage | VGS | -12 | | 12 | V | | 1 |
| Continuous Drain Current | ID | | | -2.3 | A | | 1 |
| Power Dissipation | PD | | | 0.5 | W | | 1 |
| Operating Temperature | Tj | | | 150 | ℃ | | 1 |
| Storage Temperature | Tstg | -55 | | 150 | ℃ | | 1 |
| Thermal Resistance from Junction to Ambient | RθJA | | | 250 | ℃/W | | 1 |
| Drain-source breakdown voltage | V(BR)DSS | -20 | | | V | VGS = 0V, ID =10µA | 2 |
| Gate-body leakage | IGSS | -100 | | 100 | nA | VDS =0V, VGS =±12V | 2 |
| Zero gate voltage drain current | IDSS | | | -1 | µA | VDS =-20V, VGS =0V | 2 |
| Gate-threshold voltage | VGS(th) | -0.5 | | -1.5 | V | VDS =VGS, ID =-0.25mA | 2 |
| Static drain-source on-resistance (note 1) | RDS(on) | | | 0.135 | Ω | VGS =-4.5V, ID =-2.3A | 2 |
| Static drain-source on-resistance (note 1) | RDS(on) | | | 0.24 | Ω | VGS =-2.5V, ID =-1.0A | 2 |
| Forward transconductance (note 1) | gfs | | 2.3 | | S | VDS =-5V, ID =-2.3A | 2 |
| Input capacitance | Ciss | | 430 | | pF | VDS =-20V,VGS =0V, f=1MHz | 2 |
| Output capacitance | Coss | | 100 | | pF | VDS =-20V,VGS =0V, f=1MHz | 2 |
| Reverse transfer capacitance | Crss | | 35 | | pF | VDS =-20V,VGS =0V, f=1MHz | 2 |
| Turn-on delay time (note 1,2) | td(on) | | 9 | | ns | VGS=-5V, VDS=-10V, ID =-1A,RG=3.3Ω, RD=10Ω | 2 |
| Rise time (note 2) | tr | | 25 | | ns | VGS=-5V, VDS=-10V, ID =-1A,RG=3.3Ω, RD=10Ω | 2 |
| Turn-off delay time (note 2) | td(off) | | 20 | | ns | VGS=-5V, VDS=-10V, ID =-1A,RG=3.3Ω, RD=10Ω | 2 |
| Fall time (note 2) | tf | | 10 | | ns | VGS=-5V, VDS=-10V, ID =-1A,RG=3.3Ω, RD=10Ω | 2 |
| Body diode forward voltage (note 1) | VSD | | | -1.6 | V | IS=-1A, VGS = 0V | 2 |
## CAD (KiCad official)
- Symbol: `CJA9451`
- Footprint: `Package_TO_SOT_SMD:SOT-89-3`
- 3D model: SOT-89-3L (KiCad packages3D, STEP)
- 3D model files: `cja9451-etched.step` / `cja9451-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `cja9451.step` / `cja9451.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Changjing datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8586174771675873280) (3 pp, sha256 `4f74d6428ac43e17`, retrieved 2026-10-09, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/cja9451-datasheet.pdf)