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Made with KiCad 10.0 · needs KiCad 10.0 or later to open · KiCad file format 20260206
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docs cj79l05: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
cj79l05-etched.fit.json cj79l05: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
cj79l05-etched.glb cj79l05: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
cj79l05-etched.step cj79l05: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
cj79l05.glb Publish 0.1.0 · Ray
cj79l05.kicad_mod Publish 0.1.0 · Ray
cj79l05.kicad_sym Publish 0.1.0 · Ray
cj79l05.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray
cj79l05.step Publish 0.1.0 · Ray
package.json Publish 0.2.1 · Ray
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
page.json Publish 0.2.1 · Ray
README.md cj79l05: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray

CJ79L05

Changjing · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-89-3L

CJ79L05 from Changjing, in a SOT-89-3L. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND power_in Ground reference. Common return for input and output; on SOT-89 this pin is also the thermal tab.
2 IN power_in Negative unregulated input voltage (Vi). Rated for -7 V to -20 V typical operating range, absolute maximum -30 V. Bypass with a 0.33 µF capacitor to GND close to the pin.
3 OUT power_out Regulated -5 V output (-4.75 V to -5.25 V over line/load/temperature). Delivers up to 100 mA (recommended operating 70 mA over full temp). Bypass with 0.1 µF capacitor to GND.

Key specifications

Parameter Value
Manufacturer Changjing
Package SOT-89-3L
Category PMIC
Pins 3

CAD (KiCad official)

  • Symbol: CJ79L05
  • Footprint: Package_TO_SOT_SMD:SOT-89-3
  • 3D model: SOT-89-3L (KiCad packages3D, STEP)
  • 3D model files: cj79l05-etched.step / cj79l05-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cj79l05.step / cj79l05.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
cj79l05.step 57 KB You want the bare part, or you mark your own boards.
cj79l05-etched.step 1.0 MB You want the part with CJ79L05 already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 281 faces against 42 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Changjing datasheet (1 pp, sha256 cea437b9974b333f, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF