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Made with KiCad 10.0 · needs KiCad 10.0 or later to open · KiCad file format 20260206
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docs cj78l12: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
cj78l12-etched.fit.json cj78l12: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
cj78l12-etched.glb cj78l12: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
cj78l12-etched.step cj78l12: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
cj78l12.glb Publish 0.1.0 · Ray
cj78l12.kicad_mod Publish 0.1.0 · Ray
cj78l12.kicad_sym Publish 0.1.0 · Ray
cj78l12.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray
cj78l12.step Publish 0.1.0 · Ray
package.json Publish 0.2.1 · Ray
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
page.json Publish 0.2.1 · Ray
README.md cj78l12: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray

CJ78L12

Changjing · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-89-3L

CJ78L12 from Changjing, in a SOT-89-3L. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OUT power_out Regulated +12 V output. Delivers up to 100 mA (0.1 A max). A 0.1 μF ceramic bypass capacitor to GND close to the pin is recommended for transient response and stability.
2 GND power_in Common ground reference for both input and output. The SOT-89 tab is connected to this pin and acts as the thermal path to the PCB.
3 IN power_in Unregulated input supply. Absolute maximum 35 V; must exceed VO by at least the dropout voltage (~1.7 V typ). A 0.33 μF input bypass capacitor to GND close to the pin is recommended.

Key specifications

Parameter Value
Manufacturer Changjing
Package SOT-89-3L
Category PMIC
Pins 3

CAD (KiCad official)

  • Symbol: CJ78L12
  • Footprint: Package_TO_SOT_SMD:SOT-89-3
  • 3D model: SOT-89-3L (KiCad packages3D, STEP)
  • 3D model files: cj78l12-etched.step / cj78l12-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cj78l12.step / cj78l12.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
cj78l12.step 57 KB You want the bare part, or you mark your own boards.
cj78l12-etched.step 1011 KB You want the part with CJ78L12 already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 273 faces against 42 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Changjing datasheet (2 pp, sha256 61a9aa2702ef7efa, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF