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CJ75LC0S

Public Made by Adom

by adom

Changjing Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-89-3L. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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Made with KiCad 10.0 · needs KiCad 10.0 or later to open · KiCad file format 20260206
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docs cj75lc0s: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers cj75lc0s: viewers · Ray
cj75lc0s-etched.fit.json cj75lc0s: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
cj75lc0s-etched.glb cj75lc0s: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
cj75lc0s-etched.step cj75lc0s: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
cj75lc0s.glb Publish 0.1.0 · Ray
cj75lc0s.kicad_mod Publish 0.1.0 · Ray
cj75lc0s.kicad_sym Publish 0.1.0 · Ray
cj75lc0s.lbr Publish 0.1.0 · Ray
cj75lc0s.step Publish 0.1.0 · Ray
package.json Publish 0.2.1 · Ray
page.json Publish 0.2.1 · Ray
README.md cj75lc0s: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray

CJ75LC0S

Changjing · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-89-3L

CJ75LC0S from Changjing, in a SOT-89-3L. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OUT power_out Regulated 12 V output (up to 300 mA). Requires an output capacitor between OUT and GND placed close to the pin for stability and best transient response.
2 IN power_in Unregulated input supply, 2.5 V to 36 V (absolute max 40 V). Bypass with the recommended input capacitor placed as close as possible to the IN and GND pins to minimize input impedance.
3 GND power_in Regulator ground / return reference for both input and output capacitors.

Key specifications

Parameter Value
Manufacturer Changjing
Package SOT-89-3L
Category PMIC
Pins 3

Ordering variants

Same part, different packaging or reel option.

  • CJ75LC0S

CAD (KiCad official)

  • Symbol: CJ75LC0S
  • Footprint: Package_TO_SOT_SMD:SOT-89-3
  • 3D model: SOT-89-3L (KiCad packages3D, STEP)
  • 3D model files: cj75lc0s-etched.step / cj75lc0s-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cj75lc0s.step / cj75lc0s.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
cj75lc0s.step 57 KB You want the bare part, or you mark your own boards.
cj75lc0s-etched.step 1.2 MB You want the part with CJ75LC0S already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 321 faces against 42 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Changjing datasheet (36 pp, sha256 c4e87b13b4aa0863, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF