component
CJ6330B12M
Public Made by Adomby adom
Changjing Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-23-5L. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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CJ6330B12M
Changjing · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5L
CJ6330B12M from Changjing, in a SOT-23-5L. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IN | power_in | Input to the device; place the recommended input capacitor as close as possible to the IN and GND pins to obtain the best transient response and minimize input impedance. |
| 2 | GND | power_in | Regulator ground. |
| 3 | EN | input | Enable pin: drive high to enable the device and low to turn it off; do not float this pin, and connect EN to IN if the enable function is not needed. |
| 4 | NC | unconnected | No internal connection; this pin can float, but connecting it to GND gives the device better thermal performance. |
| 5 | OUT | power_out | Regulator output; place the recommended output capacitor between OUT and GND as close as possible to the pins to maintain stability and obtain the best transient response. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Changjing |
| Package | SOT-23-5L |
| Category | Power Management (PMIC) |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input voltage | VIN | 2.5 | 18 | V | TA = 25°C | 10 | |
| DC output tolerance | -2 | 2 | % | TJ = 25°C, IOUT = 1mA | 10 | ||
| Output current | IOUT | 300 | mA | TJ = 25°C | 10 | ||
| Quiescent current | IQ | 2 | 5 | µA | IOUT = 0mA | 10 | |
| Dropout voltage | VDO | 350 | 700 | mV | VOUT < 1.8V, IOUT = 100mA | 10 | |
| Line regulation | LNR | 0.01 | 0.3 | %/V | VIN = VOUT +1V to 18V, IOUT = 10mA | 10 | |
| Output current limit | ILimit | 350 | 500 | mA | VOUT = 0.5 × VOUT Normal, VIN = 5.0V | 10 | |
| Standby current | ISTBY | 0.2 | µA | EN = GND | 10 | ||
| EN high voltage | VEN H | 1.5 | V | 10 | |||
| EN low voltage | VEN L | 0.3 | V | 10 | |||
| Input voltage range | VIN | 2.5 | 18 | V | 8 | ||
| Operating junction temperature | TJ | -40 | 125 | °C | 8 | ||
| Operating ambient temperature | TA | -40 | 85 | °C | 8 | ||
| Input voltage range (absolute maximum) | VIN | -0.3 | 24 | V | 8 | ||
| Enable input voltage range (absolute maximum) | VEN | -0.3 | 24 | V | 8 | ||
| Output voltage range (absolute maximum) | VOUT | -0.3 | 10 | V | 8 | ||
| Maximum junction temperature | TJ Max | 125 | °C | 8 | |||
| Storage temperature | Tstg | -40 | 125 | °C | 8 | ||
| Soldering temperature | Tsolder | 260 | °C | 10 s | 8 | ||
| Junction-to-ambient thermal resistance (SOT-23-5L) | RΘJA | 247.3 | °C/W | Still air, TA = 25°C, 1 in² FR-4 board with 2 oz copper | 9 | ||
| Junction-to-case thermal resistance (SOT-23-5L) | RΘJC | 64.9 | °C/W | 9 | |||
| Reference maximum power dissipation for continuous operation (SOT-23-5L) | PD Ref | 0.4 | W | Still air, TA = 25°C, 1 in² FR-4 board with 2 oz copper | 9 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | copper | • Place the input and output capacitors as close to the pins of the device as possible; • The device is connected by copper plane and the heat sink (or back pad) of the device is fully welded with | 25 |
CAD (KiCad official)
- Symbol:
CJ6330B12M - Footprint:
Package_TO_SOT_SMD:SOT-23-5 - 3D model: SOT-23-5L (KiCad packages3D, STEP)
- 3D model files:
cj6330b12m-etched.step/cj6330b12m-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cj6330b12m.step/cj6330b12m.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Changjing datasheet (35 pp, sha256
156639a21081bfbe, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# CJ6330B12M
**Changjing** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5L
CJ6330B12M from Changjing, in a SOT-23-5L. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IN | power_in | Input to the device; place the recommended input capacitor as close as possible to the IN and GND pins to obtain the best transient response and minimize input impedance. |
| 2 | GND | power_in | Regulator ground. |
| 3 | EN | input | Enable pin: drive high to enable the device and low to turn it off; do not float this pin, and connect EN to IN if the enable function is not needed. |
| 4 | NC | unconnected | No internal connection; this pin can float, but connecting it to GND gives the device better thermal performance. |
| 5 | OUT | power_out | Regulator output; place the recommended output capacitor between OUT and GND as close as possible to the pins to maintain stability and obtain the best transient response. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Changjing |
| Package | SOT-23-5L |
| Category | Power Management (PMIC) |
| Pins | 5 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input voltage | VIN | 2.5 | | 18 | V | TA = 25°C | 10 |
| DC output tolerance | | -2 | | 2 | % | TJ = 25°C, IOUT = 1mA | 10 |
| Output current | IOUT | 300 | | | mA | TJ = 25°C | 10 |
| Quiescent current | IQ | | 2 | 5 | µA | IOUT = 0mA | 10 |
| Dropout voltage | VDO | | 350 | 700 | mV | VOUT < 1.8V, IOUT = 100mA | 10 |
| Line regulation | LNR | | 0.01 | 0.3 | %/V | VIN = VOUT +1V to 18V, IOUT = 10mA | 10 |
| Output current limit | ILimit | 350 | 500 | | mA | VOUT = 0.5 × VOUT Normal, VIN = 5.0V | 10 |
| Standby current | ISTBY | | | 0.2 | µA | EN = GND | 10 |
| EN high voltage | VEN H | | 1.5 | | V | | 10 |
| EN low voltage | VEN L | | | 0.3 | V | | 10 |
| Input voltage range | VIN | 2.5 | | 18 | V | | 8 |
| Operating junction temperature | TJ | -40 | | 125 | °C | | 8 |
| Operating ambient temperature | TA | -40 | | 85 | °C | | 8 |
| Input voltage range (absolute maximum) | VIN | -0.3 | | 24 | V | | 8 |
| Enable input voltage range (absolute maximum) | VEN | -0.3 | | 24 | V | | 8 |
| Output voltage range (absolute maximum) | VOUT | -0.3 | | 10 | V | | 8 |
| Maximum junction temperature | TJ Max | | | 125 | °C | | 8 |
| Storage temperature | Tstg | -40 | | 125 | °C | | 8 |
| Soldering temperature | Tsolder | | | 260 | °C | 10 s | 8 |
| Junction-to-ambient thermal resistance (SOT-23-5L) | RΘJA | | 247.3 | | °C/W | Still air, TA = 25°C, 1 in² FR-4 board with 2 oz copper | 9 |
| Junction-to-case thermal resistance (SOT-23-5L) | RΘJC | | 64.9 | | °C/W | | 9 |
| Reference maximum power dissipation for continuous operation (SOT-23-5L) | PD Ref | | 0.4 | | W | Still air, TA = 25°C, 1 in² FR-4 board with 2 oz copper | 9 |
## Materials and finish
As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | copper | | • Place the input and output capacitors as close to the pins of the device as possible; • The device is connected by copper plane and the heat sink (or back pad) of the device is fully welded with | 25 |
## CAD (KiCad official)
- Symbol: `CJ6330B12M`
- Footprint: `Package_TO_SOT_SMD:SOT-23-5`
- 3D model: SOT-23-5L (KiCad packages3D, STEP)
- 3D model files: `cj6330b12m-etched.step` / `cj6330b12m-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `cj6330b12m.step` / `cj6330b12m.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Changjing datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603104450265292800) (35 pp, sha256 `156639a21081bfbe`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/cj6330b12m-datasheet.pdf)