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CJ6330A50P

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Changjing Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-89-3L. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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CJ6330A50P

Changjing · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-89-3L

CJ6330A50P from Changjing, in a SOT-89-3L. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND power_in Regulator ground, which is pin 1 of the SOT-89-3L package for the AxxP variant.
2 IN power_in Input to the device; the recommended input capacitor should be placed as close to the IN and GND pins as possible to obtain the best transient response and minimize input impedance.
3 OUT power_out Output of the regulator; an output capacitor must be placed between OUT and GND, as close to the pins as possible, to maintain output stability and obtain the best transient response.

Key specifications

Parameter Value
Manufacturer Changjing
Package SOT-89-3L
Category Power Management (PMIC)
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input voltage VIN 2.5 18 V TA = 25°C 10
DC output tolerance -2 2 % TJ = 25°C, IOUT = 1mA 10
Output current IOUT 300 mA TJ = 25°C 10
Quiescent current IQ 2 5 µA IOUT = 0mA 10
Dropout voltage VDO 110 270 mV VOUT = 5.0V, IOUT = 100mA 10
Line regulation LNR 0.01 0.3 %/V VIN = VOUT +1V to 18V, IOUT = 10mA 10
Output current limit ILimit 350 500 mA VOUT = 0.5 × VOUT Normal, VIN = 5.0V 10
Standby current ISTBY 0.2 µA EN = GND 10
EN high voltage VEN H 1.5 V 10
EN low voltage VEN L 0.3 V 10
Input voltage (recommended operating) VIN 2.5 18 V 8
Operating junction temperature TJ -40 125 °C 8
Operating ambient temperature TA -40 85 °C 8
Input voltage range VIN -0.3 24 V 8
Enable input voltage range VEN -0.3 24 V 8
Output voltage range VOUT -0.3 10 V 8
Maximum junction temperature TJ Max 125 °C 8
Storage temperature Tstg -40 125 °C 8
Soldering temperature Tsolder 260 °C 10 s 8
Junction-to-ambient thermal resistance (SOT-89-3L) RΘJA 159.4 °C/W Still air, TA = 25°C, 1 in² FR-4 board, 2 oz copper 9
Junction-to-case thermal resistance (SOT-89-3L) RΘJC 54.7 °C/W 9
Reference maximum power dissipation (SOT-89-3L) PD Ref 0.6 W Continuous operation, same board as RΘJA 9

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts copper • Place the input and output capacitors as close to the pins of the device as possible; • The device is connected by copper plane and the heat sink (or back pad) of the device is fully welded with 25

CAD (KiCad official)

  • Symbol: CJ6330A50P
  • Footprint: Package_TO_SOT_SMD:SOT-89-3
  • 3D model: SOT-89-3L (KiCad packages3D, STEP)
  • 3D model files: cj6330a50p-etched.step / cj6330a50p-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cj6330a50p.step / cj6330a50p.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Changjing datasheet (35 pp, sha256 156639a21081bfbe, retrieved 2026-11-05, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF