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Made with KiCad 10.0 · needs KiCad 10.0 or later to open · KiCad file format 20260206
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cj4153.glb plain STEP: one free product with face colours (generated model was nested; tscircuit read it white) · Ray 17d ago
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package.json cj4153: etched from the flattened plain STEP (service-occt 1.6.0, from the plain STEP) · Ray 17d ago
page.json cj4153: etched from the flattened plain STEP (service-occt 1.6.0, from the plain STEP) · Ray 17d ago
README.md cj4153: specified limits as data (metadata.characteristics, 15 rows from the datasheet) · Ray 18d ago

CJ4153

Changjing · MOSFETs · SOT-523

CJ4153 from Changjing, in a SOT-523. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GATE input Gate terminal of the N-channel MOSFET, with ESD protection on the gate and a maximum gate-source voltage rating of ±6 V (VGS).
2 SOURCE passive Source terminal of the N-channel MOSFET, the reference for VGS, in a 20 V (VDS) device rated for 0.915 A continuous drain current (note 1).
3 DRAIN passive Drain terminal of the N-channel MOSFET, with a drain-source voltage rating of 20 V and continuous drain current of 0.915 A (note 1).

Key specifications

Parameter Value
Manufacturer Changjing
Package SOT-523
Category Transistors/Thyristors
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Voltage VDS 20 V Ta=25℃ 1
Gate-Source Voltage VGS -6 6 V Ta=25℃ 1
Continuous Drain Current ID 0.915 A note 1: surface mounted on FR4 board, 1 in sq pad size 1
Power Dissipation PD 150 mW note 1: surface mounted on FR4 board, 1 in sq pad size 1
Thermal Resistance from Junction to Ambient RθJA 833 ℃/W note 1: surface mounted on FR4 board, 1 in sq pad size 1
Operating Junction Temperature TJ 150 ℃ 1
Storage Temperature Tstg -55 150 ℃ 1
Drain-source breakdown voltage V(BR)DSS 20 V VGS = 0V, ID =250µA 2
Gate-source leakage IGSS -1 1 µA VDS =0V, VGS =±4.5V 2
Zero gate voltage drain current IDSS 100 nA VDS =16V, VGS =0V 2
Gate-source threshold voltage VGS(th) 0.45 1.1 V VDS =VGS, ID =250µA 2
Drain-source on-state resistance RDS(on) 570 mΩ VGS =4.5V, ID =600mA 2
Drain-source on-state resistance RDS(on) 620 mΩ VGS =2.5V, ID =500mA 2
Drain-source on-state resistance RDS(on) 700 mΩ VGS =1.8V, ID =350mA 2
Drain-source on-state resistance RDS(on) 9500 mΩ VGS =1.5V, ID =40mA 2

CAD (KiCad official)

  • Symbol: CJ4153
  • Footprint: Package_TO_SOT_SMD:SOT-523
  • 3D model: SOT-523, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 0.8 mm nominal SOT-523 height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
  • 3D model files: cj4153-etched.step / cj4153-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cj4153.step / cj4153.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Changjing datasheet (5 pp, sha256 10b073a95abcb244, retrieved 2026-10-09, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF