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docs ci523: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers ci523: viewers · Ray
ci523-etched.fit.json ci523: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
ci523-etched.glb ci523: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
ci523-etched.step ci523: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
ci523.glb Publish 0.1.0 · Ray
ci523.kicad_mod Publish 0.1.0 · Ray
ci523.kicad_sym Publish 0.1.0 · Ray
ci523.lbr Publish 0.1.0 · Ray
ci523.step Publish 0.1.0 · Ray
package.json ci523: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray
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README.md Initial commit: component/ci523 · Ray

CI523

Nanjing Zhongke Microelectronics · RFID ICs · TQFN-16-EP(3x3)

CI523 from Nanjing Zhongke Microelectronics, in a TQFN-16-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VDD1 power_in PVDD power supply input (2.3V to 4.0V nominal); provides pin power supply to the chip
2 NRSTPD input Reset and power-down input; low level enables power-down mode (closes internal current and oscillator, disconnects input pins), rising edge triggers reset
3 VDD2 unconnected Floating pin; leave unconnected (not used in QFN16 variant)
4 TX1 output Transmitter 1 modulated carrier signal output for antenna driver
5 VDD3 power_in TVDD transmitter power supply (2.3V to 4.0V nominal); powers output stages of TX1 and TX2
6 TX2 output Transmitter 2 modulated carrier signal output for antenna driver
7 VDD4 power_in AVDD analog power supply (2.3V to 4.0V nominal); provides power to analog circuit blocks
8 VMID power_in Internal reference voltage; requires bypass capacitor to ground for stability
9 RX input RF signal input from antenna tuning circuit; 13.56 MHz ISO/IEC 14443 A/B signals
10 OSCIN input Crystal oscillator inverting amplifier input or external 27.12 MHz clock input (fclk = 27.12 MHz)
11 OSCOUT output Crystal oscillator inverting amplifier output for 27.12 MHz crystal connection
12 MISO output SPI master input, slave output; data output from chip to SPI master (max 10 Mbit/s)
13 MOSI input SPI master output, slave input; data input from SPI master to chip (max 10 Mbit/s)
14 SCK input SPI serial clock input from master; max frequency 10 MHz
15 NSS input SPI chip select input (active low); must be held low during SPI transaction
16 IRQ output Interrupt request output indicating interrupt events; configurable as open-drain or CMOS push-pull via IRQPushPull bit
17 VSS power_in Chip ground connection including exposed metal pad at package bottom; primary ground reference (0V)

Key specifications

Parameter Value
Manufacturer Nanjing Zhongke Microelectronics
Package TQFN-16-EP(3x3)
Category RF And Wireless
Pins 17

CAD (KiCad official)

  • Symbol: CI523
  • Footprint: Package_DFN_QFN:QFN-16-1EP_3x3mm_P0.5mm_EP1.7x1.7mm
  • 3D model: TQFN-16-EP(3x3) (KiCad packages3D, STEP)
  • 3D model files: ci523-etched.step / ci523-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ci523.step / ci523.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Nanjing Zhongke Microelectronics datasheet (46 pp, sha256 64022a798c9b7ada, retrieved 2026-09-22, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF