# CH70130AB5PR

**COSEMITECH** · Current Sensors · SOIC-8

CH70130AB5PR from COSEMITECH, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IP+ | passive | Terminal for the current being sensed, fused internally with pin 2 (primary conductor, 0.8 mΩ typical path resistance). |
| 2 | IP+ | passive | Terminal for the current being sensed, fused internally with pin 1 (primary conductor, 0.8 mΩ typical path resistance). |
| 3 | IP- | passive | Terminal for the current being sensed, fused internally with pin 4 (primary conductor, 0.8 mΩ typical path resistance). |
| 4 | IP- | passive | Terminal for the current being sensed, fused internally with pin 3 (primary conductor, 0.8 mΩ typical path resistance). |
| 5 | GND | power_in | Signal ground terminal. |
| 6 | FILTER | passive | Terminal for an external capacitor that sets the bandwidth. |
| 7 | VIOUT | output | Analog output signal, proportional to the sensed current and ratiometric to VCC; maximum is VCC +0.5 V. |
| 8 | VCC | power_in | Device power supply terminal, 5±0.5 V for the CH70130AB5 variant, absolute maximum 6 V. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | COSEMITECH |
| Package | SOIC-8 |
| Category | Sensors |
| Pins | 8 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage | VCC | 4.5 |  | 5.5 | V |  | 30 |
| Current-Sensing Range | IPR | -30 |  | 30 | A |  | 30 |
| Total Output Error | ETOT | -2 | 0.8 | 2 | % | IP = IPR(max), Tj = -40°C to 150ºC | 30 |
| Sensitivity Error | Esens | -1.5 | 0.8 | 1.5 | % | IP = IPR(max), Tj = -40°C to 150°C | 30 |
| Offset Voltage | VOE | -10 | 6 | 10 | mV | IP = 0 A, Tj = -40°C to 150ºC | 30 |
| Sensitivity Error Lifetime Drift | Esens_drift | -1 |  | 1 | % |  | 30 |
| Total Output Error Lifetime Drift | Etot_drift | -1 |  | 1 | % |  | 30 |
| Supply Current | ICC |  | 10 | 14 | mA | VCC = 5 V, output open | 8 |
| Output Capacitance Load | CL |  |  | 10 | nF | VIOUT to GND | 8 |
| Output Resistive Load | RL | 4.7 |  |  | kΩ | VIOUT to GND | 8 |
| Nonlinearity | ELIN | -1 |  | 1 | % | Through full range of IP | 8 |
| Saturation Voltage Low | VOL |  |  | 0.2 | V | RL = 4.7 kΩ, TA = 25°C | 8 |
| Supply Voltage | VCC |  |  | 6 | V |  | 6 |
| Reverse Supply Voltage | VRCC | -0.1 |  |  | V |  | 6 |
| Reverse Output Voltage | VRIOUT | -0.1 |  |  | V |  | 6 |
| Operating Ambient Temperature | TA | -40 |  | 150 | °C |  | 6 |
| Storage Temperature | TS | -65 |  | 165 | °C |  | 6 |
| Junction Temperature | TJ(max) |  |  | 165 | °C |  | 6 |
| Dielectric Strength Test Voltage | VISO |  | 3000 |  | VRMS | 60 seconds type test per UL 62368-1 (edition 3) | 6 |
| Working Voltage for Basic Isolation | VWVBI |  | 725 |  | Vpk or VDC | UL 62368-1 (edition 3) | 6 |
| Package Thermal Resistance (Junction to Ambient) | RθJA |  | 23 |  | ºC/W |  | 7 |
| Package Thermal Resistance (Junction to Lead) | RθJL |  | 5 |  | ºC/W |  | 7 |
| Sensitivity | Sens |  | 66 |  | mV/A | IPR(min) < IP < IPR(max), VCC = 5V | 30 |
| Primary Conductor Resistance | RIP |  | 0.8 |  | mΩ | TA = 25°C | 8 |
| Internal Filter Resistance | RF(int) |  | 1.7 |  | kΩ |  | 8 |
| Rise Time | tr |  | 3 |  | μs | IP = IP(max), TA = 25°C, CL = 1 nF | 8 |
| Propagation Delay | tpd |  | 2 |  | μs | IP = IP(max), TA = 25°C, CL = 1 nF | 8 |
| Response Time | tRESPONSE |  | 4 |  | μs | IP = IP(max), TA = 25°C, CL = 1 nF | 8 |
| Bandwidth | BW |  | 120 |  | kHz | Small signal -3 dB; CL = 1 nF | 8 |
| Noise Density | IND |  | 150 |  | µA(rms)/√Hz | Input-referenced noise density; TA = 25°C, CL = 1 nF | 8 |
| Noise | IN |  | 25 |  | mA(rms) | Input-referenced noise: CF = 4.7 nF, CL = 1 nF, BW = 18 kHz, TA = 25°C | 8 |
| Sensitivity Ratiometry Coefficient | SENS_RAT_COEF |  | 1.3 |  |  | VCC = 4.5 to 5.5 V, TA = 25ºC | 8 |
| Zero-Current Output Ratiometry Coefficient | QVO_RAT_COEF |  | 1 |  |  | VCC = 4.5 to 5.5 V, TA = 25ºC | 8 |
| Power-On Time | tPO |  | 62 |  | μs | Output reaches 90% of steady-state level, TA = 25°C, IP = IPR(max) applied | 8 |
| Shorted Output-to-Ground Current | ISC(GND) |  | 3.3 |  | mA | TA = 25ºC | 8 |
| Shorted Output-to-VCC Current | ISC(VCC) |  | 45 |  | mA | TA = 25ºC | 8 |

## Materials and finish

As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).

| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | copper |  | when an increasing current flows through the primary copper conduction path (from pins 1 and 2, to | 2 |

## CAD (KiCad official)

- Symbol: `CH70130AB5PR`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files: `ch70130ab5pr-etched.step` / `ch70130ab5pr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ch70130ab5pr.step` / `ch70130ab5pr.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [COSEMITECH datasheet](docs/ch70130ab5pr-datasheet.pdf) (62 pp, sha256 `bc54e9c5ff632dd6`, retrieved 2026-10-23, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/ch70130ab5pr-datasheet.pdf)