# CH563Q

**WCH(Jiangsu Qin Heng)** · Microcontroller Units (MCUs/MPUs/SOCs) · LQFP-64(10x10)

CH563Q from WCH(Jiangsu Qin Heng), in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | RSETE | passive | Resistor to ground for the ETH-PHY, 12K to 18K (12K best performance, 18K lowest power, 15K default). |
| 2 | VCC33E | power_in | 3.3V supply for the Ethernet section. |
| 3 | GND | power_in | Common ground, 0V reference. |
| 4 | RXP | input | Ethernet RXP signal. |
| 5 | RXN | input | Ethernet RXN signal. |
| 6 | VCC18E | power_in | 1.8V supply for the Ethernet section. |
| 7 | TXP | output | Ethernet TXP signal. |
| 8 | TXN | output | Ethernet TXN signal. |
| 9 | GND | power_in | Common ground, 0V reference. |
| 10 | XI | input | Crystal oscillator input. |
| 11 | XO | bidirectional | Crystal oscillator inverted output (listed as I/O). |
| 12 | VCC33U | power_in | 3.3V supply for the USB section. |
| 13 | GND | power_in | Common ground, 0V reference. |
| 14 | RSETU | passive | 12K resistor to ground for the USB-PHY. |
| 15 | DN | bidirectional | USB bus D- data line (UD-). |
| 16 | DP | bidirectional | USB bus D+ data line (UD+). |
| 17 | VCC33U | power_in | 3.3V supply for the USB section. |
| 18 | GND | power_in | Common ground, 0V reference. |
| 19 | VCC18 | power_in | 1.8V core supply for internal circuits. |
| 20 | GND | power_in | Common ground, 0V reference. |
| 21 | VCC33 | power_in | 3.3V I/O port supply. |
| 22 | PB0 | bidirectional | General-purpose I/O PB0; alternate CTS0X (UART0 MODEM clear to send) or PWM0 (PWM output 0). |
| 23 | PB1 | bidirectional | General-purpose I/O PB1; alternate DSR0X (UART0 MODEM data set ready) or CAT0 (timer 0 capture input). |
| 24 | PB2 | bidirectional | General-purpose I/O PB2; alternate RI0X (UART0 MODEM ring indicator) or PWM1 (PWM output 1). |
| 25 | PB3 | bidirectional | General-purpose I/O PB3; alternate DCD0X (UART0 MODEM carrier detect) or CAT1 (timer 1 capture input). |
| 26 | PB4 | bidirectional | General-purpose I/O PB4; alternate DTR0X (UART0 MODEM data terminal ready) or PWM2 (PWM output 2). |
| 27 | PB5 | bidirectional | General-purpose I/O PB5; alternate RTS0X (UART0 MODEM request to send) or CAT2 (timer 2 capture input). |
| 28 | VCC18 | power_in | 1.8V core supply for internal circuits. |
| 29 | VCC33 | power_in | 3.3V I/O port supply. |
| 30 | PB6 | bidirectional | General-purpose I/O PB6; alternate PWM3 (PWM output 3) or CAT3 (timer 3 capture input). |
| 31 | PB7 | bidirectional | General-purpose bidirectional digital I/O PB7. |
| 32 | PB16 | bidirectional | General-purpose I/O PB16; ADCS indicates current channel 0/1 in ADC auto-switch mode, otherwise outputs the sampling pulse. |
| 33 | PB17 | bidirectional | General-purpose I/O PB17; SCK1 is the SPI1 serial clock output. |
| 34 | PB18 | bidirectional | General-purpose I/O PB18; SDO is the SPI1 serial data output. |
| 35 | PB19 | bidirectional | General-purpose I/O PB19; SDI is the SPI1 serial data input, SDX1 the SPI1 simplex-mode data I/O. |
| 36 | RST# | input | External reset input with internal pull-up; low level resets the device, restores I/O and peripherals to defaults and starts execution from address 0. |
| 37 | GND | power_in | Common ground, 0V reference. |
| 38 | AVRT | power_in | ADC positive reference supply, nominally equal to VCC33 but isolated from it to reduce noise. |
| 39 | AIN0 | input | A/D converter input channel 0. |
| 40 | VCC33A | power_in | ADC analog 3.3V supply, nominally equal to VCC33 but isolated from it to reduce noise. |
| 41 | GND | power_in | Common ground, 0V reference. |
| 42 | VCC33 | power_in | 3.3V supply for the ADC section. |
| 43 | VCC18 | power_in | 1.8V core supply for internal circuits. |
| 44 | GND | power_in | Common ground, 0V reference. |
| 45 | VCC33 | power_in | 3.3V I/O port supply. |
| 46 | PA7 | bidirectional | General-purpose I/O PA7; alternate DTR0 (UART0 data terminal ready), TNOW0 (UART0 simplex RS485 transmit enable), TDO or external memory address line A7. |
| 47 | PA12 | bidirectional | General-purpose I/O PA12; alternate CTS0 (UART0 MODEM clear to send) or external memory address line A12. |
| 48 | GND | power_in | Common ground, 0V reference. |
| 49 | PA8 | bidirectional | 5V-tolerant general-purpose I/O PA8; alternate RTS0 (UART0 request to send), UID (USB ID input) or address line A8. |
| 50 | PA11 | bidirectional | 5V-tolerant general-purpose I/O PA11; alternate SLVCS# (slave parallel chip select input) or address line A11. |
| 51 | PA17 | bidirectional | 5V-tolerant general-purpose I/O PA17; alternate RTS1 (UART1 request to send), TNOW1 (UART1 simplex RS485 transmit enable) or address line A17. |
| 52 | PA18 | bidirectional | 5V-tolerant general-purpose I/O PA18; alternate ELINK# (Ethernet link LED drive) or address line A18. |
| 53 | PA19 | bidirectional | 5V-tolerant general-purpose I/O PA19; alternate VBUS (USB bus power detect input) or address line A19. |
| 54 | VCC18 | power_in | 1.8V core supply for internal circuits. |
| 55 | PB8 | bidirectional | 5V-tolerant general-purpose I/O PB8; RXD0 is the UART0 receiver input. |
| 56 | PB9 | bidirectional | 5V-tolerant general-purpose I/O PB9; TXD0 is the UART0 transmitter output. |
| 57 | PB10 | bidirectional | 5V-tolerant general-purpose I/O PB10; RXD1 is the UART1 receiver input, RXTX1 the UART1 simplex I/O. |
| 58 | PB11 | bidirectional | 5V-tolerant general-purpose I/O PB11; TXD1 is the UART1 transmitter output. |
| 59 | PB12 | bidirectional | 5V-tolerant general-purpose I/O PB12; SCS is the SPI0 slave chip select input. |
| 60 | PB13 | bidirectional | 5V-tolerant general-purpose I/O PB13; SCK0 is the SPI0 serial clock. |
| 61 | PB14 | bidirectional | 5V-tolerant general-purpose I/O PB14; MOSI is the SPI0 serial data pin (master out/slave in). |
| 62 | PB15 | bidirectional | 5V-tolerant general-purpose I/O PB15; MISO is the SPI0 serial data pin (master in/slave out), SDX0 the SPI0 simplex data I/O. |
| 63 | VCC33 | power_in | 3.3V I/O port supply. |
| 64 | VCC18 | power_in | 1.8V core supply for internal circuits. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | WCH(Jiangsu Qin Heng) |
| Package | LQFP-64(10x10) |
| Category | Embedded Processors & Controllers |
| Pins | 64 |

## CAD (KiCad official)

- Symbol: `CH563Q`
- Footprint: `Package_QFP:LQFP-64_10x10mm_P0.5mm`
- 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
- 3D model files: `ch563q-etched.step` / `ch563q-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ch563q.step` / `ch563q.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [WCH(Jiangsu Qin Heng) datasheet](docs/ch563q-datasheet.pdf) (154 pp, sha256 `c27334cb7b522fa1`, retrieved 2026-10-23, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/ch563q-datasheet.pdf)