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CH32V307VCT6

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WCH(Jiangsu Qin Heng) Microcontroller Units (MCUs/MPUs/SOCs), LQFP-100. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentembedded processors & controllersch32v307vct6factory-2.0.0extractor-text
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3D Model

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Symbol & Footprint

Schematic Symbol

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PCB Footprint

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Datasheet

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Contents

README

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CH32V307VCT6

WCH(Jiangsu Qin Heng) · Microcontroller Units (MCUs/MPUs/SOCs) · LQFP-100

CH32V307VCT6 from WCH(Jiangsu Qin Heng), in a LQFP-100. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PE2 bidirectional 5V-tolerant GPIO, default function PE2, alternate FSMC_A23, remap TIM10_BKIN_2/3.
2 PE3 bidirectional 5V-tolerant GPIO, default function PE3, alternate FSMC_A19, remap TIM10_CH1N_2/3.
3 PE4 bidirectional 5V-tolerant GPIO, default function PE4, alternate FSMC_A20, remap TIM10_CH2N_2/3.
4 PE5 bidirectional 5V-tolerant GPIO, default function PE5, alternate FSMC_A21, remap TIM10_CH3N_2/3.
5 PE6 bidirectional 5V-tolerant GPIO, default function PE6, alternate FSMC_A22.
6 VBAT power_in Optional backup supply of 1.8~3.6V that powers the RTC, low-speed oscillator and backup registers when VDD is off.
7 PC13-TAMPER-RTC bidirectional GPIO PC13 or TAMPER-RTC in the backup domain; limited to 2MHz output, 30pF load, not usable as a current source.
8 PC14-OSC32_IN bidirectional GPIO PC14 or 32.768kHz LSE oscillator input (analog), in the backup domain with 2MHz/30pF output limit.
9 PC15-OSC32_OUT bidirectional GPIO PC15 or 32.768kHz LSE oscillator output (analog), in the backup domain with 2MHz/30pF output limit.
10 VSS_5 power_in Ground pin VSS_5.
11 VDD_5 power_in Main power supply pin VDD_5, 2.4~3.6V.
12 OSC_IN input High-speed 3~25MHz external oscillator input (analog); on LQFP100 PD0 is a separate pin.
13 OSC_OUT output High-speed 3~25MHz external oscillator output (analog); on LQFP100 PD1 is a separate pin.
14 NRST input External reset input, Schmitt input used to reset the device.
15 PC0 bidirectional GPIO with analog function: ADC_IN10, TIM9_CH1N, UART6_TX, ETH_RGMII_RXC.
16 PC1 bidirectional GPIO with analog function: ADC_IN11, TIM9_CH2N, UART6_RX, ETH MDC and RGMII_RXCTL.
17 PC2 bidirectional GPIO with analog function: ADC_IN12, TIM9_CH3N, UART7_TX, OPA3_CH1N, ETH_MII_TXD2.
18 PC3 bidirectional GPIO with analog function: ADC_IN13, TIM10_CH3, UART7_RX, OPA4_CH1N, ETH_MII_TX_CLK.
19 VSSA power_in Analog ground.
20 VREF- power_in Negative reference voltage pin VREF-.
21 VREF+ power_in Positive reference voltage pin VREF+.
22 VDDA power_in Analog supply of 2.4~3.6V for ADC, DAC, OPA, temperature sensor, PLL and HSI; must equal VIO and be at least 2.4V when using ADC.
23 PA0-WKUP bidirectional GPIO with WKUP wake-up, ADC_IN0, USART2_CTS, TIM2_CH1/ETR, TIM5_CH1, TIM8_ETR, OPA4_OUT0.
24 PA1 bidirectional GPIO with analog function: ADC_IN1, USART2_RTS, TIM5_CH2, TIM2_CH2, OPA3_OUT0, ETH_MII_RX_CLK.
25 PA2 bidirectional GPIO with analog function: ADC_IN2, USART2_TX, TIM5_CH3, TIM2_CH3, TIM9_CH1, OPA2_OUT0, ETH MDIO.
26 PA3 bidirectional GPIO with analog function: ADC_IN3, USART2_RX, TIM5_CH4, TIM2_CH4, TIM9_CH2, OPA1_OUT0.
27 VSS_4 power_in Ground pin VSS_4.
28 VDD_4 power_in Main power supply pin VDD_4, 2.4~3.6V.
29 PA4 bidirectional GPIO with analog function: SPI1_NSS, USART2_CK, ADC_IN4, DAC1_OUT, TIM9_CH3, DVP_HSYNC.
30 PA5 bidirectional GPIO with analog function: SPI1_SCK, ADC_IN5, DAC2_OUT, OPA2_CH1N, DVP_VSYNC.
31 PA6 bidirectional GPIO with analog function: SPI1_MISO, TIM8_BKIN, ADC_IN6, TIM3_CH1, OPA1_CH1N, DVP_PCLK.
32 PA7 bidirectional GPIO with analog function: SPI1_MOSI, TIM8_CH1N, ADC_IN7, TIM3_CH2, OPA2_CH1P, ETH_MII_RX_DV.
33 PC4 bidirectional GPIO with analog function: ADC_IN14, TIM9_CH4, UART8_TX, OPA4_CH1P, ETH_MII_RXD0.
34 PC5 bidirectional GPIO with analog function: ADC_IN15, TIM9_BKIN, UART8_RX, OPA3_CH1P, ETH_MII_RXD1.
35 PB0 bidirectional GPIO with analog function: ADC_IN8, TIM3_CH3, TIM8_CH2N, OPA1_CH1P, ETH_MII_RXD2.
36 PB1 bidirectional GPIO with analog function: ADC_IN9, TIM3_CH4, TIM8_CH3N, OPA4_CH0N, ETH_MII_RXD3.
37 PB2 bidirectional 5V-tolerant GPIO PB2 that also serves as BOOT1 boot-mode select, with OPA3_CH0N.
38 PE7 bidirectional 5V-tolerant GPIO with analog function: FSMC_D4, OPA3_OUT1, TIM1_ETR_3.
39 PE8 bidirectional 5V-tolerant GPIO with analog function: FSMC_D5, OPA4_OUT1, TIM1_CH1N_3, UART5_TX_2/3.
40 PE9 bidirectional 5V-tolerant GPIO: FSMC_D6, TIM1_CH1_3, UART5_RX_2/3.
41 PE10 bidirectional 5V-tolerant GPIO: FSMC_D7, TIM1_CH2N_3, UART6_TX_2/3.
42 PE11 bidirectional 5V-tolerant GPIO: FSMC_D8, TIM1_CH2_3, UART6_RX_2/3.
43 PE12 bidirectional 5V-tolerant GPIO: FSMC_D9, TIM1_CH3N_3, UART7_TX_2/3.
44 PE13 bidirectional 5V-tolerant GPIO: FSMC_D10, TIM1_CH3_3, UART7_RX_2/3.
45 PE14 bidirectional 5V-tolerant GPIO with analog function: FSMC_D11, OPA2_OUT1, TIM1_CH4_3, UART8_TX_2/3.
46 PE15 bidirectional 5V-tolerant GPIO with analog function: FSMC_D12, OPA1_OUT1, TIM1_BKIN_3, UART8_RX_2/3.
47 PB10 bidirectional 5V-tolerant GPIO with analog function: I2C2_SCL, USART3_TX, OPA2_CH0N, ETH_MII_RX_ER.
48 PB11 bidirectional 5V-tolerant GPIO with analog function: I2C2_SDA, USART3_RX, OPA1_CH0N, ETH_MII_TX_EN.
49 VSS_1 power_in Ground pin VSS_1.
50 VIO_1 power_in I/O supply of 2.4~3.6V that sets pin output high level; must not exceed VDD.
51 PB12 bidirectional 5V-tolerant GPIO with analog function: SPI2_NSS, I2S2_WS, I2C2_SMBA, USART3_CK, TIM1_BKIN, OPA4_CH0P, CAN2_RX.
52 PB13 bidirectional 5V-tolerant GPIO with analog function: SPI2_SCK, I2S2_CK, USART3_CTS, TIM1_CH1N, OPA3_CH0P, CAN2_TX.
53 PB14 bidirectional 5V-tolerant GPIO with analog function: SPI2_MISO, TIM1_CH2N, USART3_RTS, OPA2_CH0P, SDIO_D0.
54 PB15 bidirectional 5V-tolerant GPIO with analog function: SPI2_MOSI, I2S2_SD, TIM1_CH3N, OPA1_CH0P, SDIO_D1.
55 PD8 bidirectional 5V-tolerant GPIO: FSMC_D13, USART3_TX_3, TIM9_CH1N_2/3, ETH_MII_RX_DV_1.
56 PD9 bidirectional 5V-tolerant GPIO: FSMC_D14, USART3_RX_3, TIM9_CH1_2/3, ETH_MII_RXD0_1.
57 PD10 bidirectional 5V-tolerant GPIO: FSMC_D15, USART3_CK_2/3, TIM9_CH2N_2/3, ETH_MII_RXD1_1.
58 PD11 bidirectional 5V-tolerant GPIO: FSMC_A16, USART3_CTS_2/3, TIM9_CH2_2/3, ETH_MII_RXD2_1.
59 PD12 bidirectional 5V-tolerant GPIO: FSMC_A17, TIM4_CH1_1, TIM9_CH3N_2/3, USART3_RTS_2/3.
60 PD13 bidirectional 5V-tolerant GPIO: FSMC_A18, TIM4_CH2_1, TIM9_CH3_2/3.
61 PD14 bidirectional 5V-tolerant GPIO: FSMC_D0, TIM4_CH3_1, TIM9_BKIN_2/3.
62 PD15 bidirectional 5V-tolerant GPIO: FSMC_D1, TIM4_CH4_1, TIM9_CH4_2/3.
63 PC6 bidirectional 5V-tolerant GPIO: I2S2_MCK, TIM8_CH1, SDIO_D6, ETH_RXP (10M PHY receive).
64 PC7 bidirectional 5V-tolerant GPIO: I2S3_MCK, TIM8_CH2, SDIO_D7, ETH_RXN (10M PHY receive).
65 PC8 bidirectional 5V-tolerant GPIO: TIM8_CH3, SDIO_D0, ETH_TXP (10M PHY transmit), DVP_D2.
66 PC9 bidirectional 5V-tolerant GPIO: TIM8_CH4, SDIO_D1, ETH_TXN (10M PHY transmit), DVP_D3.
67 PA8 bidirectional 5V-tolerant GPIO: USART1_CK, TIM1_CH1, MCO clock output, I2S3_MCK.
68 PA9 bidirectional 5V-tolerant GPIO: USART1_TX, TIM1_CH2, OTG_FS_VBUS, DVP_D0.
69 PA10 bidirectional 5V-tolerant GPIO: USART1_RX, TIM1_CH3, OTG_FS_ID, DVP_D1.
70 PA11 bidirectional 5V-tolerant GPIO with analog function: USART1_CTS, CAN1_RX, TIM1_CH4, OTG_FS_DM.
71 PA12 bidirectional 5V-tolerant GPIO with analog function: USART1_RTS, CAN1_TX, TIM1_ETR, TIM10_CH1N, OTG_FS_DP.
72 PA13 bidirectional 5V-tolerant pin that is SWDIO debug data after reset, with TIM10_CH2N and remappable to PA13.
73 NC unconnected Listed as Unused in the pin table; no function.
74 VSS_2 power_in Ground pin VSS_2.
75 VDD_2 power_in Main power supply pin VDD_2, 2.4~3.6V.
76 PA14 bidirectional 5V-tolerant pin that is SWCLK debug clock after reset, with TIM10_CH3N, TIM8_CH2N_1, UART8_TX_1.
77 PA15 bidirectional 5V-tolerant GPIO: SPI3_NSS, SPI3_MOSI, I2S3_WS, TIM2_CH1/ETR remaps, SPI1_NSS_1.
78 PC10 bidirectional 5V-tolerant GPIO: UART4_TX, SDIO_D2, TIM10_ETR, DVP_D8.
79 PC11 bidirectional 5V-tolerant GPIO: UART4_RX, SDIO_D3, TIM10_CH4, DVP_D4.
80 PC12 bidirectional 5V-tolerant GPIO: UART5_TX, SDIO_CK, TIM10_BKIN, DVP_D9.
81 PD0 bidirectional 5V-tolerant GPIO with analog function: FSMC_D2, CAN1_RX_3, TIM10_ETR_2/3.
82 PD1 bidirectional 5V-tolerant GPIO with analog function: FSMC_D3, CAN1_TX_3, TIM10_CH1_2/3.
83 PD2 bidirectional 5V-tolerant GPIO: TIM3_ETR, UART5_RX, SDIO_CMD, DVP_D11, FSMC_NADV.
84 PD3 bidirectional 5V-tolerant GPIO: FSMC_CLK, USART2_CTS_1, TIM10_CH2_2/3.
85 PD4 bidirectional 5V-tolerant GPIO: FSMC_NOE, USART2_RTS_1.
86 PD5 bidirectional 5V-tolerant GPIO: FSMC_NWE, USART2_TX_1, TIM10_CH3_2/3.
87 PD6 bidirectional 5V-tolerant GPIO: FSMC_NWAIT, DVP_D10, USART2_RX_1.
88 PD7 bidirectional 5V-tolerant GPIO: FSMC_NE1, FSMC_NCE2, USART2_CK_1, TIM10_CH4_2/3.
89 PB3 bidirectional 5V-tolerant GPIO: SPI3_SCK, I2S3_CK, DVP_D5, TIM2_CH2 remaps, SPI1_SCK_1.
90 PB4 bidirectional 5V-tolerant GPIO: SPI3_MISO, TIM3_CH1_2, SPI1_MISO_1, UART5_TX_1.
91 PB5 bidirectional 5V-tolerant GPIO: I2C1_SMBA, SPI3_MOSI, I2S3_SD, ETH_MII_PPS_OUT, TIM3_CH2_2.
92 PB6 bidirectional 5V-tolerant GPIO: I2C1_SCL, TIM4_CH1, USBFS_DM, USBHS_DM, DVP_D5.
93 PB7 bidirectional 5V-tolerant GPIO: I2C1_SDA, FSMC_NADV, TIM4_CH2, USBFS_DP, USBHS_DP.
94 BOOT0 input Boot mode selection input BOOT0 (with BOOT1 selects flash, system memory or SRAM boot).
95 PB8 bidirectional 5V-tolerant GPIO with analog function: TIM4_CH3, SDIO_D4, TIM10_CH1, DVP_D6, ETH_MII_TXD3.
96 PB9 bidirectional 5V-tolerant GPIO with analog function: TIM4_CH4, SDIO_D5, TIM10_CH2, DVP_D7.
97 PE0 bidirectional 5V-tolerant GPIO: TIM4_ETR, FSMC_NBL0, UART4_TX_2/3.
98 PE1 bidirectional 5V-tolerant GPIO: FSMC_NBL1, UART4_RX_2/3.
99 VSS_3 power_in Ground pin VSS_3.
100 VIO_3 power_in I/O supply of 2.4~3.6V that sets pin output high level; must not exceed VDD.

Key specifications

Parameter Value
Manufacturer WCH(Jiangsu Qin Heng)
Package LQFP-100
Category Embedded Processors & Controllers
Pins 100

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Ambient temperature during operation TA -40 85 ℃ 53
Ambient temperature during storage TS -40 125 ℃ 53
External main supply voltage (including VDDA and VDD) VDD-VSS -0.3 4 V 53
I/O supply voltage VI/O-VSS -0.3 4 V 53
Input voltage on FT (5V tolerance) pin VIN 5.5 V FT pin 53
Variations between different main power supply pins /ΔVDD_x/ 50 mV 53
Variations between different I/O power supply pins /ΔVI/O_x/ 50 mV 53
Variations between different ground pins /ΔVSS_x/ 50 mV 53
ESD voltage (HBM, non-contact) VESD(HBM) 4 K V 53
ESD voltage USB pins (PA11, PA12) VESD(HBM) 3 K V USB pins (PA11, PA12) 53
Total current into VDD/VDDA/VIO power lines (source) IVDD 150 mA 54
Total current out of VSS ground lines (sink) IVss 150 mA 54
Sink current on any I/O and control pin II/O 25 mA 54
Source current on any I/O and control pin II/O -25 mA 54
Injected current on other pins IINJ(PIN) -5 5 mA 54
Total injected current on all I/Os and control pins ∑IINJ(PIN) -25 25 mA 54
Internal HB clock frequency FHCLK 144 MHz 54
Standard operating voltage, USB or ETH not used VDD 2.4 3.6 V USB or ETH not used. 54
Standard operating voltage, USB or ETH used VDD 3 3.6 V Use USB or ETH 54
Output voltage on most I/O pins VIO 2.4 3.6 V VI/O cannot be more than VDD 54
Analog operating voltage (ADC is not used) VDDA 2.4 3.6 V VDDA must be the same as VI/O, VREF+ cannot be higher than VDDA, VREF- is equal to VSS. 54
Backup operating voltage VBAT 1.8 3.6 V Cannot be more than VDD 54
Ambient temperature TA -40 85 ℃ 54
Junction temperature range TJ -40 105 ℃ 54
VDD rise time rate tVDD 0 us/V 54
VDD fall time rate tVDD 20 us/V 54
Internal reference voltage VREFINT 1.17 1.2 1.23 V TA = -40℃~85℃ 56
Supply current in Run mode, external clock, all peripherals enabled IDD 22.4 mA FHCLK = 144MHz 57
Supply current in Run mode, external clock, all peripherals disabled IDD 12.4 mA FHCLK = 144MHz 57
Supply current in Stop mode IDD 110 uA Voltage regulator in Run mode, low-speed and high-speed internal RC oscillators and external oscillators off (no independent watchdog) 58
Supply current in Standby mode IDD 1 uA LSI/LSE/RTC/IWDG off, all RAM not powered 59
External clock frequency (HSE) FHSE_ext 3 8 25 MHz 60
OSC_IN input leakage current IL -1 1 uA 60
User external clock frequency (LSE) FLSE_ext 32.768 1000 kHz 60
OSC32_IN input leakage current IL -1 1 uA 60
Resonator frequency (HSE crystal) FOSC_IN 3 8 25 MHz 60
HSE startup time tSU(HSE) 1.5 4 ms VDD is stable, 8M crystal 61
LSE startup time tSU(LSE) 800 mS VDD is stable 61
HSI frequency (after calibration) FHSI 8 MHz 62
HSI accuracy ACCHSI -1.8 1.8 % TA = 0℃~70℃ 62
HSI accuracy ACCHSI -3 2.5 % TA = -40℃~85℃ 62
HSI oscillator power consumption IDD(HSI) 120 180 270 uA 62
LSI frequency FLSI 25 39 60 kHz 62
PLL multiplier output clock FPLL_OUT 18 144 MHz 62
PLL lock time tLOCK 80 200 us 62
Page (256 bytes) programming time tprog_page 2 2.5 ms TA = -40℃～85℃ 63
Page (256 bytes) erase time terase_page 16 20 ms TA = -40℃～85℃ 63
Programming voltage Vprog 2.4 3.6 V 63
Standard I/O pin Schmitt trigger voltage hysteresis Vhys 150 mV Standard I/O pin 64
Input leakage current, standard I/O port Ilkg 1 uA Standard I/O port 64
Input leakage current, FT I/O port Ilkg 3 uA FT I/O port 64
Pull-up equivalent resistance RPU 30 40 50 kΩ 64
Pull-down equivalent resistance RPD 30 40 50 kΩ 64
I/O pin capacitance CI/O 5 pF 64
Output low level, 8 pins sink current VOL 0.4 V TTL port, IIO = +8mA, 2.7V< VDD <3.6V 64
Output low level, 8 pins sink current VOL 1 V IIO = +20mA, 2.7V< VDD <3.6V 64
NRST pull-up equivalent resistance RPU 30 40 50 kΩ 65
Temperature sensor average slope Avg_Slope 3.8 4.3 4.7 mV/℃ 82
Temperature sensor voltage at 25℃ V25 1.34 1.4 1.46 V 82
ADC supply voltage VDDA 2.4 3.6 V 80
ADC clock frequency fADC 14 MHz 80

CAD (KiCad official)

  • Symbol: CH32V307VCT6
  • Footprint: Package_QFP:LQFP-100_14x14mm_P0.5mm
  • 3D model: LQFP-100 (KiCad packages3D, STEP)
  • 3D model files: ch32v307vct6-etched.step / ch32v307vct6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ch32v307vct6.step / ch32v307vct6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: WCH(Jiangsu Qin Heng) datasheet (92 pp, sha256 43642859cc6a1284, retrieved 2026-10-22, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF