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CH32F205RBT6

Public Made by Adom

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WCH(Jiangsu Qin Heng) Microcontroller Units (MCUs/MPUs/SOCs), LQFP-64(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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3D Model

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Symbol & Footprint

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Datasheet

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Contents

README

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CH32F205RBT6

WCH(Jiangsu Qin Heng) · Microcontroller Units (MCUs/MPUs/SOCs) · LQFP-64(10x10)

CH32F205RBT6 from WCH(Jiangsu Qin Heng), in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VBAT power_in Backup supply of 1.8-3.6V that powers the RTC, external low-speed oscillator and backup registers when VDD is off.
2 PC13/TAMPER-RTC bidirectional GPIO PC13 powered via the backup power switch (3mA limit, 2MHz, 30pF max as output) with TAMPER-RTC function.
3 PC14/OSC32IN bidirectional GPIO PC14 on the backup power switch (3mA limit, 2MHz output only) that is also the 32.768kHz oscillator input OSC32_IN.
4 PC15/OSC32OUT bidirectional GPIO PC15 on the backup power switch (3mA limit, 2MHz output only) that is also the 32.768kHz oscillator output OSC32_OUT.
5 OSC_IN/PD0 input High-speed 3-25MHz external oscillator input after reset, reconfigurable by software as PD0.
6 OSC_OUT/PD1 output High-speed external oscillator output after reset, reconfigurable by software as PD1.
7 NRST input External reset input.
8 PC0 bidirectional GPIO PC0 with ADC input 10, TIM9_CH1N, UART6_TX and ETH_RGMII_RXC alternate functions.
9 PC1 bidirectional GPIO PC1 with ADC input 11, TIM9_CH2N, UART6_RX and Ethernet MDC/RGMII_RXCTL alternate functions.
10 PC2 bidirectional GPIO PC2 with ADC input 12, TIM9_CH3N, UART7_TX and OPA3_CH1N alternate functions.
11 PC3 bidirectional GPIO PC3 with ADC input 13, TIM10_CH3, UART7_RX and OPA4_CH1N alternate functions.
12 VSSA power_in Analog ground.
13 VDDA power_in Analog supply of 2.4-3.6V for the ADC, DAC, PLL, temperature sensor and RC oscillator, which must equal VIO and be at least 2.4V when the ADC is used.
14 PA0-WKUP bidirectional GPIO PA0 with WKUP wake-up, USART2_CTS, ADC input 0, TIM2_CH1/ETR and TIM5_CH1 alternate functions.
15 PA1 bidirectional GPIO PA1 with USART2_RTS, ADC input 1, TIM5_CH2, TIM2_CH2 and OPA3_OUT0 alternate functions.
16 PA2 bidirectional GPIO PA2 with USART2_TX, ADC input 2, TIM5_CH3, TIM2_CH3 and OPA2_OUT0 alternate functions.
17 PA3 bidirectional GPIO PA3 with USART2_RX, ADC input 3, TIM5_CH4, TIM2_CH4 and OPA1_OUT0 alternate functions.
18 VSS_4 power_in Ground for the VDD_4 supply group.
19 VDD_4 power_in Supply of 2.4-3.6V for part of the I/O pins and the internal voltage regulator.
20 PA4 bidirectional GPIO PA4 with ADC input 4, DAC output 1, SPI1_NSS and USART2_CK alternate functions.
21 PA5 bidirectional GPIO PA5 with ADC input 5, DAC output 2, SPI1_SCK and OPA2_CH1N alternate functions.
22 PA6 bidirectional GPIO PA6 with ADC input 6, SPI1_MISO, TIM3_CH1 and OPA1_CH1N alternate functions.
23 PA7 bidirectional GPIO PA7 with ADC input 7, SPI1_MOSI, TIM3_CH2 and OPA2_CH1P alternate functions.
24 PC4 bidirectional GPIO PC4 with ADC input 14, UART8_TX and OPA4_CH1P alternate functions.
25 PC5 bidirectional GPIO PC5 with ADC input 15, UART8_RX and OPA3_CH1P alternate functions.
26 PB0 bidirectional GPIO PB0 with ADC input 8, TIM3_CH3 and OPA1_CH1P alternate functions.
27 PB1 bidirectional GPIO PB1 with ADC input 9, TIM3_CH4 and OPA4_CH0N alternate functions.
28 PB2/BOOT1 bidirectional 5V-tolerant GPIO PB2 that also serves as the BOOT1 boot-mode select pin.
29 PB10 bidirectional 5V-tolerant GPIO PB10 with I2C2_SCL, USART3_TX and OPA2_CH0N alternate functions.
30 PB11 bidirectional 5V-tolerant GPIO PB11 with I2C2_SDA, USART3_RX and OPA1_CH0N alternate functions.
31 VSS_1 power_in Ground for the VIO_1 supply group.
32 VIO_1 power_in I/O supply of 2.4-3.6V that sets pin output high level and must not exceed VDD.
33 PB12 bidirectional 5V-tolerant GPIO PB12 with SPI2_NSS, I2C2_SMBA, USART3_CK and TIM1_BKIN alternate functions.
34 PB13 bidirectional 5V-tolerant GPIO PB13 with SPI2_SCK, USART3_CTS and TIM1_CH1N alternate functions.
35 PB14 bidirectional 5V-tolerant GPIO PB14 with SPI2_MISO, TIM1_CH2N, USART3_RTS and OPA2_CH0P alternate functions.
36 PB15 bidirectional 5V-tolerant GPIO PB15 with SPI2_MOSI, TIM1_CH3N and OPA1_CH0P alternate functions.
37 PC6 bidirectional GPIO PC6 with TIM8_CH1, I2S2_MCK and SDIO_D6 alternate functions.
38 PC7 bidirectional GPIO PC7 with TIM8_CH2, I2S3_MCK and SDIO_D7 alternate functions.
39 PC8 bidirectional GPIO PC8 with TIM8_CH3 and SDIO_D0 alternate functions.
40 PC9 bidirectional GPIO PC9 with TIM8_CH4 and SDIO_D1 alternate functions.
41 PA8 bidirectional 5V-tolerant GPIO PA8 with USART1_CK, TIM1_CH1 and MCO alternate functions.
42 PA9 bidirectional 5V-tolerant GPIO PA9 with USART1_TX and TIM1_CH2 alternate functions.
43 PA10 bidirectional 5V-tolerant GPIO PA10 with USART1_RX and TIM1_CH3 alternate functions.
44 PA11/USB1DM bidirectional 5V-tolerant GPIO PA11 with USB D- (USB1DM), USART1_CTS, CAN1_RX and TIM1_CH4 alternate functions.
45 PA12/USB1DP bidirectional 5V-tolerant GPIO PA12 with USB D+ (USB1DP), USART1_RTS, CAN1_TX and TIM1_ETR alternate functions.
46 PA13/SWDIO bidirectional 5V-tolerant GPIO PA13 that is the SWDIO debug data pin, enabled by default after reset.
47 VSS_2 power_in Ground for the VDD_2 supply group.
48 VDD_2 power_in Supply of 2.4-3.6V for part of the I/O pins and the internal voltage regulator.
49 PA14/SWCLK bidirectional 5V-tolerant GPIO PA14 that is the SWCLK debug clock pin, enabled by default after reset.
50 PA15 bidirectional 5V-tolerant GPIO PA15 with SPI3_NSS, I2S3_WS, SPI1_NSS and TIM2_CH1_ETR alternate functions.
51 PC10 bidirectional 5V-tolerant GPIO PC10 with UART4_TX, SDIO_D2 and SPI3_SCK alternate functions.
52 PC11 bidirectional 5V-tolerant GPIO PC11 with UART4_RX, SDIO_D3 and SPI3_MISO alternate functions.
53 PC12 bidirectional 5V-tolerant GPIO PC12 with UART5_TX, SDIO_CK and SPI3_MOSI alternate functions.
54 PD2 bidirectional 5V-tolerant GPIO PD2 with TIM3_ETR, UART5_RX and SDIO_CMD alternate functions.
55 PB3 bidirectional 5V-tolerant GPIO PB3 with SPI3_SCK, TRACESWO, TIM2_CH2 and SPI1_SCK alternate functions.
56 PB4 bidirectional 5V-tolerant GPIO PB4 with SPI3_MISO, TIM3_CH1 and SPI1_MISO alternate functions.
57 PB5 bidirectional GPIO PB5 (not 5V tolerant) with I2C1_SMBA, SPI3_MOSI, SPI1_MOSI and CAN2_RX alternate functions.
58 PB6/USB2DM bidirectional 5V-tolerant GPIO PB6 with I2C1_SCL, TIM4_CH1 and USB D- (USBHD_DM/USBHS_DM) functions.
59 PB7/USB2DP bidirectional 5V-tolerant GPIO PB7 with I2C1_SDA, TIM4_CH2 and USB D+ (USBHD_DP/USBHS_DP) functions.
60 BOOT0 input Boot mode select input.
61 PB8 bidirectional 5V-tolerant GPIO PB8 with TIM4_CH3, SDIO_D4, I2C1_SCL and CAN1_RX alternate functions.
62 PB9 bidirectional 5V-tolerant GPIO PB9 with TIM4_CH4, SDIO_D5, I2C1_SDA and CAN1_TX alternate functions.
63 VSS_3 power_in Ground for the VIO_3 supply group.
64 VIO_3 power_in I/O supply of 2.4-3.6V that sets pin output high level and must not exceed VDD.

Key specifications

Parameter Value
Manufacturer WCH(Jiangsu Qin Heng)
Package LQFP-64(10x10)
Category Single Chip Microcomputer/Microcontroller
Pins 64

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Ambient temperature during operation TA -40 85 ℃ 49
Ambient temperature during storage TS -40 125 ℃ 49
External main supply voltage (including VDDA and VDD) VDD-VSS -0.3 4 V 49
IO domain supply voltage VIO-VSS -0.3 4 V 49
Input voltage on FT (5V tolerant) pin VIN -0.3 5.5 V VSS-0.3 to 5.5 49
Variations between different main power supply pins /ΔVDD_x/ 50 mV 49
Variations between different IO power supply pins /ΔVIO_x/ 50 mV 49
Variations between different ground pins /ΔVSS_x/ 50 mV 49
Total current into VDD/VDDA power lines (source) IVDD 150 mA 49
Total current out of VSS ground lines (sink) IVss 150 mA 50
Sink current on any I/O and control pin IIO 25 mA 50
Output current on any I/O and control pin IIO -25 mA 50
Injected current on NRST pin IINJ(PIN) -5 5 mA 50
Injected current on other pins IINJ(PIN) -5 5 mA 50
Total injected current on all IOs and control pins ΣIINJ(PIN) -25 25 mA 50
Internal AHB clock frequency FHCLK 144 MHz 50
Internal APB1 clock frequency FPCLK1 144 MHz 50
Internal APB2 clock frequency FPCLK2 144 MHz 50
Standard operating voltage VDD 2.4 3.6 V 50
Operating voltage using USB or ETH VDD 3 3.6 V Use USB or ETH 50
IO supply voltage VIO 2.4 3.6 V VIO cannot be more than VDD 50
Analog operating voltage (ADC not used) VDDA 2.4 3.6 V VDDA must be the same as VIO. VREF+ cannot be more than VDDA. VREF- is equal to VSS. 50
Backup operating voltage VBAT 1.8 3.6 V Cannot be more than VDD 50
Ambient temperature TA -40 85 ℃ 50
Junction temperature range TJ -40 85 ℃ 50
VDD rise time rate tVDD 0 us/V VDD rise time rate 50
VDD fall time rate tVDD 30 us/V VDD fall time rate 50
Power-on/power-down reset threshold, rising edge VPOR/PDR 1.9 2.2 2.4 V Rising edge 51
Power-on/power-down reset threshold, falling edge VPOR/PDR 1.9 2.2 2.4 V Falling edge 51
Power on reset time tRSTTEMPO 24 28 30 mS Power on reset 51
Other resets time tRSTTEMPO 8 10 30 mS Other resets 51
Internal reference voltage VREFINT 1.17 1.2 1.23 V TA = -40℃～85℃ 51
External clock frequency (HSE) FHSE_ext 3 8 25 MHz 57
OSC_IN input pin high level voltage VHSEH 0.8 V min printed 0.8VIO, max VIO 57
OSC_IN input leakage current IL -1 1 uA 58
Accuracy of HSI oscillator ACCHSI -2.2 2.2 % TA = -40℃～85℃ 60
Accuracy of HSI oscillator ACCHSI -1 1.6 % TA = 0℃～70℃ 60
HSI oscillator power consumption IDD(HSI) 120 180 270 uA 60
LSI frequency FLSI 25 39 60 kHz 60
PLL multiplier output clock FPLL_OUT 18 144 MHz 60
Programming voltage Vprog 2.4 3.6 V 61
Flash data retention tRET 20 year 61
Weak pull-up equivalent resistance RPU 30 40 55 kΩ 62
Weak pull-down equivalent resistance RPD 30 40 55 kΩ 62
Output low level, TTL port VOL 0.4 V TTL port, IIO = +8mA, 2.7V< VDD <3.6V 62
Output low level, IIO=+20mA VOL 1.3 V IIO = +20mA, 2.7V< VDD <3.6V 62
ADC supply voltage VDDA 2.4 3.6 V 78
ADC clock frequency fADC 14 MHz 78
ADC offset error EO 2 LSB fPCLK2 = 56 MHz, fADC = 14 MHz, RAIN < 10 kΩ, VDDA = 3.3V; printed ±2 79
Temperature sensor average slope Avg_Slope 3.8 4.3 4.7 mV/℃ 80
Temperature sensor voltage at 25℃ V25 1.34 1.4 1.46 V 80

CAD (KiCad official)

  • Symbol: CH32F205RBT6
  • Footprint: Package_QFP:LQFP-64_10x10mm_P0.5mm
  • 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
  • 3D model files: ch32f205rbt6-etched.step / ch32f205rbt6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ch32f205rbt6.step / ch32f205rbt6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: WCH(Jiangsu Qin Heng) datasheet (86 pp, sha256 f6363e3b6e70c3ee, retrieved 2026-10-23, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF