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CH32F103C8T6

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WCH(Jiangsu Qin Heng) Microcontroller Units (MCUs/MPUs/SOCs), LQFP-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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CH32F103C8T6

WCH(Jiangsu Qin Heng) · Microcontroller Units (MCUs/MPUs/SOCs) · LQFP-48(7x7)

CH32F103C8T6 from WCH(Jiangsu Qin Heng), in a LQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VBAT power_in Backup supply of 1.8~5.5V (not above VDD) that powers the RTC, external 32kHz oscillator and backup registers when VDD is off.
2 PC13 bidirectional General I/O PC13 after reset, with TAMPER-RTC as default alternate function.
3 PC14 bidirectional I/O/analog pin PC14 after reset, with OSC32_IN (32.768kHz crystal input) as default alternate function.
4 PC15 bidirectional I/O/analog pin PC15 after reset, with OSC32_OUT (32.768kHz crystal output) as default alternate function.
5 OSC_IN input Analog/Schmitt input for the 4~16MHz HSE crystal or external clock; can be remapped to PD0.
6 OSC_OUT output Analog/CMOS output for the 4~16MHz HSE crystal; can be remapped to PD1.
7 NRST bidirectional External reset I/O pin with internal weak pull-up of 30~55kΩ, low-level input max 0.8V.
8 VSSA power_in Analog ground, must be connected to VSS.
9 VDDA power_in Analog supply of 2.75.5V (3.05.5V when ADC is used) for ADC, temperature sensor and PLL, must be connected to VDD.
10 PA0-WKUP bidirectional I/O/analog PA0 with WKUP, USART2_CTS, ADC_IN0, TIM2_CH1 and TIM2_ETR alternate functions.
11 PA1 bidirectional I/O/analog PA1 with USART2_RTS, ADC_IN1 and TIM2_CH2 alternate functions.
12 PA2 bidirectional I/O/analog PA2 with USART2_TX, ADC_IN2 and TIM2_CH3 alternate functions.
13 PA3 bidirectional I/O/analog PA3 with USART2_RX, ADC_IN3 and TIM2_CH4 alternate functions.
14 PA4 bidirectional I/O/analog PA4 with SPI1_NSS, USART2_CK, ADC_IN4 and DAC_OUT1 alternate functions.
15 PA5 bidirectional I/O/analog PA5 with SPI1_SCK, ADC_IN5 and DAC_OUT2 alternate functions.
16 PA6 bidirectional I/O/analog PA6 with SPI1_MISO, ADC_IN6 and TIM3_CH1; remap TIM1_BKIN.
17 PA7 bidirectional I/O/analog PA7 with SPI1_MOSI, ADC_IN7 and TIM3_CH2; remap TIM1_CH1N.
18 PB0 bidirectional I/O/analog PB0 with ADC_IN8 and TIM3_CH3; remap TIM1_CH2N.
19 PB1 bidirectional I/O/analog PB1 with ADC_IN9 and TIM3_CH4; remap TIM1_CH3N.
20 PB2/BOOT1 bidirectional General I/O PB2, also serves as BOOT1 boot mode select.
21 PB10 bidirectional I/O PB10 with I2C2_SCL and USART3_TX; remap TIM2_CH3.
22 PB11 bidirectional I/O PB11 with I2C2_SDA and USART3_RX; remap TIM2_CH4.
23 VSS_1 power_in Digital ground.
24 VDD_1 power_in Digital supply of 2.7~5.5V for I/O, RC oscillators, reset module and voltage regulator.
25 PB12 bidirectional I/O PB12 with SPI2_NSS, I2C2_SMBAI, USART3_CK and TIM1_BKIN.
26 PB13 bidirectional I/O PB13 with SPI2_SCK, USART3_CTS and TIM1_CH1N.
27 PB14 bidirectional I/O PB14 with SPI2_MISO, USART3_RTS and TIM1_CH2N.
28 PB15 bidirectional I/O PB15 with SPI2_MOSI and TIM1_CH3N.
29 PA8 bidirectional I/O PA8 with USART1_CK, TIM1_CH1 and MCO.
30 PA9 bidirectional I/O PA9 with USART1_TX and TIM1_CH2.
31 PA10 bidirectional I/O PA10 with USART1_RX and TIM1_CH3.
32 PA11 bidirectional I/O/analog PA11 with USART1_CTS, USBDM, CAN_RX and TIM1_CH4.
33 PA12 bidirectional I/O/analog PA12 with USART1_RTS, USBDP, CAN_TX and TIM1_ETR.
34 PA13 bidirectional I/O pin whose main function after reset is SWDIO (serial wire debug data).
35 VSS_2 power_in Digital ground.
36 VDD_2 power_in Digital supply of 2.7~5.5V.
37 PA14 bidirectional I/O pin whose main function after reset is SWCLK (serial wire debug clock).
38 PA15 bidirectional I/O PA15 with remap functions TIM2_CH1/TIM2_ETR and SPI1_NSS.
39 PB3 bidirectional I/O PB3 with remap functions TRACESWO, TIM2_CH2 and SPI1_SCK.
40 PB4 bidirectional I/O PB4 with remap functions TIM3_CH1 and SPI1_MISO.
41 PB5 bidirectional I/O PB5 with I2C1_SMBAI; remap TIM3_CH2 and SPI1_MOSI.
42 PB6 bidirectional I/O/analog PB6 with I2C1_SCL, TIM4_CH1 and USBHDM; remap USART1_TX.
43 PB7 bidirectional I/O/analog PB7 with I2C1_SDA, TIM4_CH2 and USBHDP; remap USART1_RX.
44 BOOT0 input Boot mode select input, used with BOOT1 to choose flash, system memory or SRAM boot.
45 PB8 bidirectional I/O/analog PB8 with TIM4_CH3; remap I2C1_SCL and CAN_RX.
46 PB9 bidirectional I/O/analog PB9 with TIM4_CH4; remap I2C1_SDA and CAN_TX.
47 VSS_3 power_in Digital ground.
48 VDD_3 power_in Digital supply of 2.7~5.5V.

Key specifications

Parameter Value
Manufacturer WCH(Jiangsu Qin Heng)
Package LQFP-48(7x7)
Category Single Chip Microcomputer/Microcontroller
Pins 48

CAD (KiCad official)

  • Symbol: CH32F103C8T6
  • Footprint: Package_QFP:LQFP-48_7x7mm_P0.5mm
  • 3D model: LQFP-48(7x7) (KiCad packages3D, STEP)
  • 3D model files: ch32f103c8t6-etched.step / ch32f103c8t6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ch32f103c8t6.step / ch32f103c8t6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: WCH(Jiangsu Qin Heng) datasheet (29 pp, sha256 1f68cc1270a5d14a, retrieved 2026-10-22, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF