component
CH221K
Public Made by Adomby adom
WCH(Nanjing Qinheng) Others, SOT-23-6. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 17d ago |
| viewers | 17d ago |
| ch221k-etched.glb | 17d ago |
| ch221k-etched.step | 17d ago |
| ch221k-hero.glb | 17d ago |
| ch221k-hero.overlay.json | 17d ago |
| ch221k.glb | 17d ago |
| ch221k.kicad_mod | 17d ago |
| ch221k.kicad_sym | 17d ago |
| ch221k.lbr | 17d ago |
| ch221k.step | 17d ago |
| package.json | 17d ago |
| page.json | 17d ago |
| README.md | 17d ago |
CH221K
WCH(Nanjing Qinheng) · Others · SOT-23-6
CH221K from WCH(Nanjing Qinheng), in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD | power_in | Working power input: add a 1uF capacitor to GND and a series resistor to VBUS; the absolute maximum VDD is 5.8 V and the internal LDO regulates VDD to 3.0-3.6 V (3.3 V typical). |
| 2 | GND | power_in | Common ground pin. |
| 3 | PG | bidirectional | Default Power Good indicator, active low, open-drain output with a customizable function; the absolute maximum voltage on PG is 13.5 V. |
| 4 | CC1 | bidirectional | Type-C CC signal line; the absolute maximum voltage on CC1 is 8 V. |
| 5 | CC2 | bidirectional | Type-C CC signal line; the absolute maximum voltage on CC2 is 8 V. |
| 6 | CFG | input | Power-level configuration input pin, used with a single-resistor (Rset to GND) or I/O-level configuration; the datasheet lists its pin type as open-drain (OD). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | WCH(Nanjing Qinheng) |
| Package | SOT-23-6 |
| Category | Others |
| Pins | 6 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating ambient temperature (工作时的环境温度) TA | TA | -40 | 105 | ℃ | 13 | ||
| Storage ambient temperature (储存时的环境温度) TS | TS | -55 | 125 | ℃ | 13 | ||
| Supply voltage VDD (工作电源电压) | VDD | -0.5 | 5.8 | V | VDD pin connected to supply, GND pin connected to ground | 13 | |
| Voltage on high-voltage open-drain pin PG (VODHV) | VODHV | -0.5 | 13.5 | V | 13 | ||
| Voltage on CC1, CC2 pins (VIOCC) | VIOCC | -0.5 | 8 | V | 13 | ||
| Voltage on CFG pin (VIOUX) | VIOUX | -0.5 | V | Printed maximum is VDD+0.5 V (not a fixed number) | 13 | ||
| Total chip maximum power dissipation (PD) | PD | 250 | mW | VDD voltage × current | 13 | ||
| Internal regulator VDD shunt regulation voltage (内部电源调节器VDD并联稳压) | VLDOK | 3 | 3.3 | 3.6 | V | TA = 25℃ | 14 |
| Internal regulator VDD shunt sink current capability (内部电源调节器VDD并联吸收电流能力) | ILDO | 0 | 30 | mA | TA = 25℃ | 14 | |
| Power-on reset voltage threshold (电源上电复位的电压门限) | VR | 2.2 | 2.4 | 2.6 | V | TA = 25℃ | 14 |
CAD (KiCad official)
- Symbol:
CH221K - Footprint:
Package_TO_SOT_SMD:SOT-23-6 - 3D model: SOT-23-6 (KiCad packages3D, STEP)
- 3D model files:
ch221k-etched.step/ch221k-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ch221k.step/ch221k.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: WCH(Nanjing Qinheng) datasheet (16 pp, sha256
df4f8a9f305df715, retrieved 2026-10-17, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).