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CESDLC5V0M5
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TECH PUBLIC ESD And Surge Protection (TVS/ESD), SOT-563. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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CESDLC5V0M5
TECH PUBLIC · ESD And Surge Protection (TVS/ESD) · SOT-563
CESDLC5V0M5 from TECH PUBLIC, in a SOT-563. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | I/O1 | passive | ESD-protected I/O line with a TVS diode to GND, rated 5 V max reverse working voltage and 0.5 pF typical capacitance to GND. |
| 2 | GND | power_in | Common ground node of the TVS array, connected directly to the shared diode rail in the schematic; all I/O pins are referenced to it. |
| 3 | I/O2 | passive | ESD-protected I/O line with a TVS diode to GND, rated 5 V max reverse working voltage and 0.5 pF typical capacitance to GND. |
| 4 | I/O3 | passive | ESD-protected I/O line with a TVS diode to GND, rated 5 V max reverse working voltage and 0.5 pF typical capacitance to GND. |
| 5 | I/O4 | passive | ESD-protected I/O line with a TVS diode to GND, rated 5 V max reverse working voltage and 0.5 pF typical capacitance to GND. |
| 6 | I/O5 | passive | ESD-protected I/O line with a TVS diode to GND, rated 5 V max reverse working voltage and 0.5 pF typical capacitance to GND. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | TECH PUBLIC |
| Package | SOT-563 |
| Category | Circuit Protection |
| Pins | 6 |
CAD (KiCad official)
- Symbol:
CESDLC5V0M5 - Footprint:
Package_TO_SOT_SMD:SOT-563 - 3D model: SOT-563 (KiCad packages3D, STEP)
- 3D model files:
cesdlc5v0m5-etched.step/cesdlc5v0m5-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cesdlc5v0m5.step/cesdlc5v0m5.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: TECH PUBLIC datasheet (4 pp, sha256
89baaafa993a62fb, retrieved 2026-10-09, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# CESDLC5V0M5
**TECH PUBLIC** · ESD And Surge Protection (TVS/ESD) · SOT-563
CESDLC5V0M5 from TECH PUBLIC, in a SOT-563. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | I/O1 | passive | ESD-protected I/O line with a TVS diode to GND, rated 5 V max reverse working voltage and 0.5 pF typical capacitance to GND. |
| 2 | GND | power_in | Common ground node of the TVS array, connected directly to the shared diode rail in the schematic; all I/O pins are referenced to it. |
| 3 | I/O2 | passive | ESD-protected I/O line with a TVS diode to GND, rated 5 V max reverse working voltage and 0.5 pF typical capacitance to GND. |
| 4 | I/O3 | passive | ESD-protected I/O line with a TVS diode to GND, rated 5 V max reverse working voltage and 0.5 pF typical capacitance to GND. |
| 5 | I/O4 | passive | ESD-protected I/O line with a TVS diode to GND, rated 5 V max reverse working voltage and 0.5 pF typical capacitance to GND. |
| 6 | I/O5 | passive | ESD-protected I/O line with a TVS diode to GND, rated 5 V max reverse working voltage and 0.5 pF typical capacitance to GND. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | TECH PUBLIC |
| Package | SOT-563 |
| Category | Circuit Protection |
| Pins | 6 |
## CAD (KiCad official)
- Symbol: `CESDLC5V0M5`
- Footprint: `Package_TO_SOT_SMD:SOT-563`
- 3D model: SOT-563 (KiCad packages3D, STEP)
- 3D model files: `cesdlc5v0m5-etched.step` / `cesdlc5v0m5-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `cesdlc5v0m5.step` / `cesdlc5v0m5.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [TECH PUBLIC datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603387076268613632) (4 pp, sha256 `89baaafa993a62fb`, retrieved 2026-10-09, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/cesdlc5v0m5-datasheet.pdf)