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CEM7350-JSM

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JSMSEMI MOSFETs, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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CEM7350-JSM

JSMSEMI · MOSFETs · SOP-8

CEM7350-JSM from JSMSEMI, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S1 passive Source of the N-channel MOSFET (VDS=100V, ID=2.2A, RDS(ON)<120mΩ at VGS=10V).
2 G1 input Gate of the N-channel MOSFET, with absolute maximum VGS of ±20V.
3 S2 passive Source of the P-channel MOSFET (VDS=-100V, ID=-1.8A, RDS(ON)<200mΩ at VGS=-10V).
4 G2 input Gate of the P-channel MOSFET, with absolute maximum VGS of ±20V.
5 D2 passive Drain of the P-channel MOSFET, rated -100V VDS and tied to pin 6.
6 D2 passive Drain of the P-channel MOSFET, rated -100V VDS and tied to pin 5.
7 D1 passive Drain of the N-channel MOSFET, rated 100V VDS and tied to pin 8.
8 D1 passive Drain of the N-channel MOSFET, rated 100V VDS and tied to pin 7.

Key specifications

Parameter Value
Manufacturer JSMSEMI
Package SOP-8
Category Transistors/Thyristors
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Gate-Source Voltage (N-Channel) VGS -20 20 V 1
Gate-Source Voltage (P-Channel) VGS -20 20 V 1
Operating and Storage Junction Temperature Range TJ, TSTG -55 150 ℃ 1
Gate-Source Leakage Current (N-Channel) IGSS -100 100 nA VGS=±20V, VDS=0A 2
Gate-Source Leakage Current (P-Channel) IGSS -100 100 nA VGS=±20V, VDS=0A 5
GATE-Source Threshold Voltage (N-Channel) VGS(th) 1.2 2.5 V VGS=VDS, ID=250μA 2
GATE-Source Threshold Voltage (P-Channel) VGS(th) -1.2 -1.6 -2.5 V VGS=VDS, ID=250μA 5
Drain-Source Breakdown Voltage (N-Channel) BVDSS 100 V VGS=0V,ID=250μA 2
Drain-Source Breakdown Voltage (P-Channel) BVDSS -100 V VGS=0V,ID=250μA 5
Zero Gate Voltage Drain Current (N-Channel) IDSS 10 μA VGS=0V, VDS=80V,TJ=25℃ 2
Zero Gate Voltage Drain Current (N-Channel) IDSS 100 μA VGS=0V, VDS=80V,TJ=55℃ 2
Zero Gate Voltage Drain Current (P-Channel) IDSS -1 μA VGS=0V, VDS=-100V,TJ=25℃ 5
Zero Gate Voltage Drain Current (P-Channel) IDSS -10 μA VGS=0V, VDS=-80V,TJ=125℃ 5
Drain-Source On Resistance (N-Channel) RDS(ON) 86 120 mΩ VGS=10V,ID=2A 2
Drain-Source On Resistance (P-Channel) RDS(ON) 190 225 mΩ VGS=-10V,ID=-1.8A 5
Drain-Source On Resistance (P-Channel) RDS(ON) 180 200 mΩ VGS=-4.5V,ID=-1.5A 5
Source-Drain Diode Forward Voltage (N-Channel) VSD 1.2 V VGS=0V,IS=1A,,TJ=25℃ 3
Continuous Source Current (N-Channel) IS 2.2 A VG=VD=0V , Force Current 3
Pulsed Source Current (N-Channel) ISM 13.2 A 3
Diode Forward Voltage (P-Channel) VSD -1 V VGS=0V,IS=-1A,TJ=25℃ 6
Continuous Source Current (P-Channel) IS -1.8 A VG=VD=0V , Force Current 6
Input Capacitance (P-Channel) Ciss 1455 2200 pF VDS=-50V, VGS=0V, f=1MHz 5
Output Capacitance (P-Channel) Coss 880 1300 pF 5
Reverse Transfer Capacitance (P-Channel) Crss 58 85 pF 5
Total Gate Charge (P-Channel) Qg 20 40 nC VGS=-10V,VDS=-80V,ID=-1.8A 6
Gate-Source Charge (P-Channel) Qgs 3.5 7 nC 6
Gate-Drain Charge (P-Channel) Qgd 4.6 9 nC 6
Turn-On Delay Time (P-Channel) td(on) 18 36 ns VGS=-10V,VDD=-50V RG=25Ω,ID=-1.8A 6
Rise Time (P-Channel) tr 8 16 ns 6
Turn-Off Delay Time (P-Channel) td(off) 100 200 ns 6
Fall Time (P-Channel) tf 30 60 ns 6
Drain-Source Breakdown Voltage (N-Channel) VDS 100 V 1
Drain-Source Voltage (P-Channel) VDS -100 V 1
Continuous Drain Current (N-Channel) ID 2.2 A TA=25℃ 1
Continuous Drain Current (P-Channel) ID -1.8 A TA=25℃ 1
Continuous Drain Current (N-Channel) ID 1.7 A TA=70℃ 1
Continuous Drain Current (P-Channel) ID -1.4 A TA=70℃ 1
Pulsed Drain Current (N-Channel) IDM 13.2 A 1
Pulsed Drain Current (P-Channel) IDM -7.2 A 1
Power Dissipation (N-Channel) PD 1.5 W 1
Power Dissipation (P-Channel) PD 2 W 1
Thermal Resistance, Junction to Ambient (N-Channel) RθJA 85 ℃/W 1
Thermal Resistance, Junction to Ambient (P-Channel) RθJA 62.5 ℃/W 1
Thermal Resistance Junction-Case (N-Channel) RθJC 25 ℃/W 1
Forward Transconductance (N-Channel) GFS 10.2 S VDS=5V, ID=2A 2
Forward Transconductance (P-Channel) GFS 6.5 S VDS=--10V, ID=-3A 5
Gate Resistance (N-Channel) RG 2.1 Ω VDS=0V , VGS=0V , f=1MHz 2
Gate resistance (P-Channel) Rg 16 Ω VGS=0V, VDS=0V, F=1MHz 5
Input Capacitance (N-Channel) Ciss 1050 pF VDS=15V, VGS=0V, f=1MHz 2
Output Capacitance (N-Channel) Coss 45 pF 2
Reverse Transfer Capacitance (N-Channel) Crss 30 pF 2
Gate Charge (N-Channel) Qg 18.4 nc VGS=10V VDS=80V ID=2A 2
Gate-Drain Charge (N-Channel) Qgd 3.1 nc 2
Turn-On Delay Time (N-Channel) td(on) 5.6 ns VDD=50V , VGS=10V , RG=3.3, ID=2A 2
Rise Time (N-Channel) tr 20 ns 2
Turn-Off Delay Time (N-Channel) td(off) 28 ns 2
Fall Time (N-Channel) tf 24 ns 2
Reverse Recovery Time (P-Channel) Trr 13 ns VR=-100V, IS=-1A di/dt=100A/μs, TJ=25℃ 6
Reverse Recovery Charge (P-Channel) Qrr 15 nC 6

CAD (KiCad official)

  • Symbol: CEM7350-JSM
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: cem7350-jsm-etched.step / cem7350-jsm-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cem7350-jsm.step / cem7350-jsm.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: JSMSEMI datasheet (8 pp, sha256 06ed6be31ba7c08a, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF