# CEDM7001 TR PBFREE

**Central Semicon** · MOSFETs · SOT-883L

CEDM7001 TR PBFREE from Central Semicon, in a SOT-883L. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Gate | input | Gate terminal of the N-channel enhancement-mode MOSFET, rated for a gate-source voltage of 10 V (VGS), with rDS(ON) specified at VGS = 2.5 V and 4.0 V. |
| 2 | Source | passive | Source terminal of the N-channel MOSFET; the datasheet lists it only as lead code 2) Source and gives no separate electrical limit for this pin. |
| 3 | Drain | passive | Drain terminal of the N-channel MOSFET, rated for 20 V drain-source voltage (VDS) with 100 mA continuous and 200 mA peak (10 μs pulse) drain current. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Central Semicon |
| Package | SOT-883L |
| Category | Transistors/Thyristors |
| Pins | 3 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Gate-Source Leakage Current (forward and reverse) | IGSSF, IGSSR |  |  | 1 | μA | VGS=10V, VDS=0 | 1 |
| Drain-Source Leakage Current | IDSS |  |  | 1 | μA | VDS=20V, VGS=0 | 1 |
| Drain-Source Breakdown Voltage | BVDSS | 20 |  |  | V | VGS=0, ID=100μA | 1 |
| Gate Threshold Voltage | VGS(th) | 0.6 |  | 0.9 | V | VDS=VGS, ID=250μA | 1 |
| Static Drain-Source On-Resistance | rDS(ON) |  | 0.9 | 3 | Ω | VGS=4.0V, ID=10mA | 1 |
| Static Drain-Source On-Resistance | rDS(ON) |  | 1.3 | 4 | Ω | VGS=2.5V, ID=10mA | 1 |
| Static Drain-Source On-Resistance | rDS(ON) |  |  | 15 | Ω | VGS=1.5V, ID=1.0mA | 1 |
| Drain-Source Voltage | VDS |  |  | 20 | V | TA=25°C | 1 |
| Gate-Source Voltage | VGS |  |  | 10 | V | TA=25°C | 1 |
| Continuous Drain Current (Steady State) | ID |  |  | 100 | mA | Steady State, TA=25°C | 1 |
| Peak Drain Current | IDM |  |  | 200 | mA | tp=10μs | 1 |
| Power Dissipation | PD |  |  | 100 | mW | TA=25°C | 1 |
| Operating and Storage Junction Temperature | TJ, Tstg | -65 |  | 150 | °C | TA=25°C | 1 |

## CAD (KiCad official)

- Symbol: `CEDM7001 TR PBFREE`
- Footprint: `Package_TO_SOT_SMD:SOT-883`
- 3D model: SOT-883L, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 1.45 mm nominal SOT height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
- 3D model files: `cedm7001-tr-pbfree-etched.step` / `cedm7001-tr-pbfree-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `cedm7001-tr-pbfree.step` / `cedm7001-tr-pbfree.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Central Semicon datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590457574761140225) (4 pp, sha256 `0252d11ec69b5810`, retrieved 2026-10-09, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/cedm7001-tr-pbfree-datasheet.pdf)