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CEA6861-VB
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VBsemi Elec MOSFETs, SOT-89. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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CEA6861-VB
VBsemi Elec · MOSFETs · SOT-89
CEA6861-VB from VBsemi Elec, in a SOT-89. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | G | input | Gate of the P-channel MOSFET, limited to ±20 V gate-source voltage with a threshold of -1.2 V to -2.5 V at ID = -250 µA. |
| 2 | D | passive | Drain of the P-channel MOSFET (also the exposed tab), rated for -60 V drain-source and -6.5 A continuous at TC = 25 °C. |
| 3 | S | passive | Source of the P-channel MOSFET, with a continuous body-diode current of 6.9 A at TC = 25 °C. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | VBsemi Elec |
| Package | SOT-89 |
| Category | Transistors/Thyristors |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Voltage | VDS | -60 | V | 1 | |||
| Gate-Source Voltage | VGS | -20 | 20 | V | 1 | ||
| Continuous Drain Current | ID | -5.2 | A | TJ = 150 °C, TC = 70 °C | 1 | ||
| Pulsed Drain Current | IDM | -20 | A | 1 | |||
| Avalanche Current Pulse | IAS | -4.5 | A | L = 0.1 mH | 1 | ||
| Single Pulse Avalanche Energy | EAS | 10.1 | mJ | 1 | |||
| Maximum Power Dissipation | PD | 10.4 | W | TC = 25 °C | 1 | ||
| Maximum Power Dissipation | PD | 6.6 | W | TC = 70 °C | 1 | ||
| Maximum Power Dissipation | PD | 2.1 | W | TA = 25 °C | 1 | ||
| Maximum Power Dissipation | PD | 1.1 | W | TA = 70 °C | 1 | ||
| Continuous Source-Drain Diode Current | IS | -6.9 | A | TC = 25 °C | 2 | ||
| Continuous Source-Drain Diode Current | IS | 3.5 | A | TA = 25 °C | 1 | ||
| Operating Junction and Storage Temperature Range | TJ, Tstg | -55 | 150 | °C | 1 | ||
| Maximum Junction-to-Ambient | RthJA | 33 | 40 | °C/W | Steady state, surface mounted on 1in x 1in FR4 board | 1 | |
| Maximum Junction-to-Case | RthJC | 0.98 | 1.2 | °C/W | Steady state | 1 | |
| Drain-Source Breakdown Voltage | V(BR)DSS | -60 | V | VGS = 0 V, ID = -250 µA | 2 | ||
| Gate-Source Threshold Voltage | VGS(th) | -1.2 | 2.5 | V | VDS = VGS, ID = -250 µA | 2 | |
| Gate-Source Leakage | IGSS | -100 | 100 | nA | VDS = 0 V, VGS = ±20 V | 2 | |
| Zero Gate Voltage Drain Current | IDSS | -1 | µA | VDS = -60 V, VGS = 0 V | 2 | ||
| Zero Gate Voltage Drain Current | IDSS | -10 | µA | VDS = -60 V, VGS = 0 V, TJ = 55 °C | 2 | ||
| On-State Drain Current | ID(on) | -25 | A | VDS = -5 V, VGS = -10 V | 2 | ||
| Drain-Source On-State Resistance | RDS(on) | 0.058 | Ω | VGS = -10 V, ID = -3 A | 2 | ||
| Drain-Source On-State Resistance | RDS(on) | 0.065 | Ω | VGS = -4.5 V, ID = -2 A | 2 | ||
| Forward Transconductance | gfs | 20 | S | VDS = -15 V, ID = -5 A | 2 | ||
| Total Gate Charge | Qg | 38 | 56 | nC | VDS = -30 V, VGS = -10 V, ID = -5 A | 2 | |
| Total Gate Charge | Qg | 19 | 30 | nC | VDS = -30 V, VGS = -4.5 V, ID = -5 A | 2 | |
| Turn-On Delay Time | td(on) | 10 | 15 | ns | VDD = -2 V, RL = 2 Ω, ID ≅ -5 A, VGEN = -10 V, Rg = 1 Ω | 2 | |
| Rise Time | tr | 7 | 15 | ns | VDD = -2 V, RL = 2 Ω, ID ≅ -5 A, VGEN = -10 V, Rg = 1 Ω | 2 | |
| Turn-Off Delay Time | td(off) | 70 | 110 | ns | VDD = -2 V, RL = 2 Ω, ID ≅ -5 A, VGEN = -10 V, Rg = 1 Ω | 2 | |
| Fall Time | tf | 40 | 60 | ns | VDD = -2 V, RL = 2 Ω, ID ≅ -5 A, VGEN = -10 V, Rg = 1 Ω | 2 | |
| Body Diode Voltage | VSD | -1 | -1.5 | V | IS = -3 A | 2 | |
| Body Diode Reverse Recovery Time | trr | 45 | 68 | ns | IF = -5 A, di/dt = 10 A/µs, TJ = 25 °C | 2 | |
| Body Diode Reverse Recovery Charge | Qrr | 59 | 120 | nC | IF = -5 A, di/dt = 10 A/µs, TJ = 25 °C | 2 |
CAD (KiCad official)
- Symbol:
CEA6861-VB - Footprint:
Package_TO_SOT_SMD:SOT-89-3 - 3D model: SOT-89 (KiCad packages3D, STEP)
- 3D model files:
cea6861-vb-etched.step/cea6861-vb-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cea6861-vb.step/cea6861-vb.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: VBsemi Elec datasheet (7 pp, sha256
7b132f473738adf4, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# CEA6861-VB
**VBsemi Elec** · MOSFETs · SOT-89
CEA6861-VB from VBsemi Elec, in a SOT-89. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | G | input | Gate of the P-channel MOSFET, limited to ±20 V gate-source voltage with a threshold of -1.2 V to -2.5 V at ID = -250 µA. |
| 2 | D | passive | Drain of the P-channel MOSFET (also the exposed tab), rated for -60 V drain-source and -6.5 A continuous at TC = 25 °C. |
| 3 | S | passive | Source of the P-channel MOSFET, with a continuous body-diode current of 6.9 A at TC = 25 °C. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | VBsemi Elec |
| Package | SOT-89 |
| Category | Transistors/Thyristors |
| Pins | 3 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Voltage | VDS | -60 | | | V | | 1 |
| Gate-Source Voltage | VGS | -20 | | 20 | V | | 1 |
| Continuous Drain Current | ID | -5.2 | | | A | TJ = 150 °C, TC = 70 °C | 1 |
| Pulsed Drain Current | IDM | -20 | | | A | | 1 |
| Avalanche Current Pulse | IAS | -4.5 | | | A | L = 0.1 mH | 1 |
| Single Pulse Avalanche Energy | EAS | | | 10.1 | mJ | | 1 |
| Maximum Power Dissipation | PD | | | 10.4 | W | TC = 25 °C | 1 |
| Maximum Power Dissipation | PD | | | 6.6 | W | TC = 70 °C | 1 |
| Maximum Power Dissipation | PD | | | 2.1 | W | TA = 25 °C | 1 |
| Maximum Power Dissipation | PD | | | 1.1 | W | TA = 70 °C | 1 |
| Continuous Source-Drain Diode Current | IS | -6.9 | | | A | TC = 25 °C | 2 |
| Continuous Source-Drain Diode Current | IS | | | 3.5 | A | TA = 25 °C | 1 |
| Operating Junction and Storage Temperature Range | TJ, Tstg | -55 | | 150 | °C | | 1 |
| Maximum Junction-to-Ambient | RthJA | | 33 | 40 | °C/W | Steady state, surface mounted on 1in x 1in FR4 board | 1 |
| Maximum Junction-to-Case | RthJC | | 0.98 | 1.2 | °C/W | Steady state | 1 |
| Drain-Source Breakdown Voltage | V(BR)DSS | -60 | | | V | VGS = 0 V, ID = -250 µA | 2 |
| Gate-Source Threshold Voltage | VGS(th) | -1.2 | | 2.5 | V | VDS = VGS, ID = -250 µA | 2 |
| Gate-Source Leakage | IGSS | -100 | | 100 | nA | VDS = 0 V, VGS = ±20 V | 2 |
| Zero Gate Voltage Drain Current | IDSS | -1 | | | µA | VDS = -60 V, VGS = 0 V | 2 |
| Zero Gate Voltage Drain Current | IDSS | -10 | | | µA | VDS = -60 V, VGS = 0 V, TJ = 55 °C | 2 |
| On-State Drain Current | ID(on) | -25 | | | A | VDS = -5 V, VGS = -10 V | 2 |
| Drain-Source On-State Resistance | RDS(on) | | | 0.058 | Ω | VGS = -10 V, ID = -3 A | 2 |
| Drain-Source On-State Resistance | RDS(on) | | | 0.065 | Ω | VGS = -4.5 V, ID = -2 A | 2 |
| Forward Transconductance | gfs | 20 | | | S | VDS = -15 V, ID = -5 A | 2 |
| Total Gate Charge | Qg | | 38 | 56 | nC | VDS = -30 V, VGS = -10 V, ID = -5 A | 2 |
| Total Gate Charge | Qg | | 19 | 30 | nC | VDS = -30 V, VGS = -4.5 V, ID = -5 A | 2 |
| Turn-On Delay Time | td(on) | | 10 | 15 | ns | VDD = -2 V, RL = 2 Ω, ID ≅ -5 A, VGEN = -10 V, Rg = 1 Ω | 2 |
| Rise Time | tr | | 7 | 15 | ns | VDD = -2 V, RL = 2 Ω, ID ≅ -5 A, VGEN = -10 V, Rg = 1 Ω | 2 |
| Turn-Off Delay Time | td(off) | | 70 | 110 | ns | VDD = -2 V, RL = 2 Ω, ID ≅ -5 A, VGEN = -10 V, Rg = 1 Ω | 2 |
| Fall Time | tf | | 40 | 60 | ns | VDD = -2 V, RL = 2 Ω, ID ≅ -5 A, VGEN = -10 V, Rg = 1 Ω | 2 |
| Body Diode Voltage | VSD | | -1 | -1.5 | V | IS = -3 A | 2 |
| Body Diode Reverse Recovery Time | trr | | 45 | 68 | ns | IF = -5 A, di/dt = 10 A/µs, TJ = 25 °C | 2 |
| Body Diode Reverse Recovery Charge | Qrr | | 59 | 120 | nC | IF = -5 A, di/dt = 10 A/µs, TJ = 25 °C | 2 |
## CAD (KiCad official)
- Symbol: `CEA6861-VB`
- Footprint: `Package_TO_SOT_SMD:SOT-89-3`
- 3D model: SOT-89 (KiCad packages3D, STEP)
- 3D model files: `cea6861-vb-etched.step` / `cea6861-vb-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `cea6861-vb.step` / `cea6861-vb.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [VBsemi Elec datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8609103904390848513) (7 pp, sha256 `7b132f473738adf4`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/cea6861-vb-datasheet.pdf)