component

CDSOT23-SM712

Public Made by Adom

by adom

Bourns TVS Diodes, SOT-23. KiCad symbol, footprint and 3D as used on Adom boards; pin functions from the manufacturer datasheet.

componenttransistors/thyristorscdsot23-sm712board-derived

Verified CDSOT23-SM712

by Claude, at Caleb Taylor's request · last 27 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 4 records

27 Oct 2026Claude, at Caleb Taylor's requestValidated against Bourns' CDSOT23-SM712 datasheet (REV. 06/24); 3D model rebuilt to the package drawingfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓Datasheet: Bourns REV. 06/24 downloaded 2026-10-27 from bourns.com/docs/Product-Datasheets/CDSOT23-SM712.pdf; replaces the JLCPCB copy of REV. 01/18
  • ✓Pins: the datasheet names pins only by number; schematic (p.1) shows pins 1 and 2 each joined to common pin 3 through a TVS stack; names 1/2/3 kept, all passive; descriptions rewritten from the p.1 schematic and Electrical Characteristics table
  • •Footprint vs Product Dimensions and Recommended Footprint (p.2): KiCad SOT-23 pads 1.325 x 0.60 mm at 2.275 mm row spacing and 1.90 mm pitch (E 1.90 BSC); Bourns recommends 0.85 x 0.85 mm pads at 2.00 mm row spacing. The KiCad pads span 0.475-1.80 mm from centre and cover the leads (lead span D 2.10-2.49, foot K 0.40-0.58, lead width F 0.30-0.50); pin 1 top-left, pin 2 bottom-left, pin 3 right: the datasheet top view rotated 90 degrees, not mirrored
  • ✓DigiKey CDSOT23-SM712TR-ND (Bourns Inc., tape and reel, from the DigiKey search; the page had false with a wrong 'no exact-MPN listing' note, now replaced) and Mouser 652-CDSOT23-SM712 (kept)
  • ✓3D source: tier 1 none (Bourns links its 3D models from the bourns.com product page, which answers curl (browser headers) with a Cloudflare JavaScript challenge (HTTP 403 "Just a moment..."); guessed /docs/ model paths return the same challenge; a web search found no direct bourns.com STEP. No manufacturer STEP retrievable without solving the challenge (2026-10-27).) Tier 2 rejected (KiCad Package_TO_SOT_SMD.3dshapes/SOT-23-3.step (= SOT-23.step): lead span 2.50 x length 3.00 x height 1.20 mm; G 0.89-1.17 and D 2.10-2.49: height and lead span out of tolerance.) Tier 3: model rebuilt with the KiCad 3D model generator (gitlab.com/kicad/libraries/kicad-packages3D-generator, commit e272fcc8) from Bourns CDSOT23-SM712 datasheet REV. 06/24, Product Dimensions, p.2; parameters in provenance/3d-generator-params.yaml; Adom-authored, CC-BY-SA-4.0
  • ✓3D body vs drawing: body 2.90 x 1.30 mm at the parting line (1.20 at top and bottom, 8 deg draft): A 2.80-3.00, C 1.20-1.40: pass; lead span 2.40 mm: D 2.10-2.49: pass; overall height 1.03 mm (etched 1.035): G 0.89-1.17: pass; standoff 0.10: H 0.05-0.15: pass; feet 0.40 wide, 0.45 long, 0.14 thick: F 0.30-0.50, K 0.40-0.58, L 0.08-0.20: pass; leads at x -1.20..-0.84 (y +/-0.95) and x +0.84..+1.20 (y 0): on footprint pads 1, 2 (x -1.1375) and 3 (x +1.1375): pass; no pin-1 dot on the part (Bourns marking A2YWWL only): none modelled
  • ✓3D pose: cdsot23-sm712.step and cdsot23-sm712-etched.step are Z-up, seated on z = 0, centred on the footprint origin (offset 0.0 mm), footprint (model) binding identity (step_pose.py); the source was built in the footprint frame, so the transform is identity; the etched file adds the adom-chip-laser MPN inlay on the top face; GLBs from step2glb convert; footprint (model) path now ${KIPRJMOD}/cdsot23-sm712.step with only that line changed (pads untouched); provenance/3d-model.json records source, terms, hashes, transform and checks
  • •Datasheet conflict: the Product Dimensions table prints H (standoff) as '0.05 - 0.015' mm while the inch column gives 0.002-0.006 in (0.05-0.15 mm); 0.05-0.15 mm used
  • ✓Symbol Datasheet / MPN / Manufacturer / DigiKey / Mouser / LCSC properties agree with page.json; footprint Datasheet property points at the manufacturer datasheet URL
  • ✓component-page-verify: all checks pass
Evidencedatasheet (Bourns)
Verified files✓ cdsot23-sm712.kicad_sym✓ cdsot23-sm712.kicad_mod✓ cdsot23-sm712.step
16 Oct 2026Claude (AI build)Related wiki pages exist for different orderable numbers (adom/cdsot23-sm712-es, adom/tpcd...superseded
reviewfor all variants
  • •Related wiki pages exist for different orderable numbers (adom/cdsot23-sm712-es, adom/tpcdsot23-sm712); this page is the plain CDSOT23-SM712.
16 Oct 2026Claude (AI build)The datasheet names pins only by number (Pin 1, 2, 3); the board symbol names (TVS1, TVS2,...superseded
reviewfor all variants
  • •The datasheet names pins only by number (Pin 1, 2, 3); the board symbol names (TVS1, TVS2, TVS2) are replaced by the numbers. Pin 3 is the common node of both TVS stacks.
16 Oct 2026Claude (AI build)Automated build checks (awaiting human validation)superseded
SymbolFootprint3D modelPinsfor all variants
  • ✓Footprint extracted pad-for-pad from the source board and normalized to the footprint frame (back-side parts un-mirrored)
  • ✓3D model seated z=0 at footprint origin (placement inverse; method centroid-matched to KiCad library models on 59 cases)
  • ✓adom-lbr generate + lint passed
  • ✓3 of 3 pins described from the datasheet (adom-ds2sf, page-cited)
  • •Not yet checked by a person: land pattern vs datasheet, pin-1/orientation, 3D body vs drawing
Evidencedatasheet
Verified files! cdsot23-sm712.kicad_sym! cdsot23-sm712.kicad_mod! cdsot23-sm712.step
Spot something wrong? Report it as an issue Propose a fix Records are signed by members of adom.
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← Commit history

Add component metadata and pin table

Caleb ·d5e9f561a7 ·12d ago ·parent 66c061c
1 file changed +143−30
page.json+143−30
page.json+143−30
@@ -1,28 +1,35 @@ {   "schema_version": 1,-  "slug": "cdsot23-sm712",   "type": "component",-  "kind": "component",+  "slug": "cdsot23-sm712",   "title": "CDSOT23-SM712",   "brief": "Bourns TVS Diodes, SOT-23. KiCad symbol, footprint and 3D as used on Adom boards; pin functions from the manufacturer datasheet.",   "version": "0.1.0",-  "because": "No wiki page exists for this MPN: searched the wiki registry by MPN, slug and LCSC number on 2026-10-16 under every owner; no match.",-  "hero": {-    "type": "billboard",-    "headline": "CDSOT23-SM712",-    "subhead": "Bourns TVS Diodes",-    "screenshot": "docs/hero.png",-    "chrome": false-  },+  "license": "CC-BY-SA-4.0",+  "tags": [+    "component",+    "transistors/thyristors",+    "cdsot23-sm712",+    "board-derived",+    "staged-for-validation"+  ],   "component": {     "mpn": "CDSOT23-SM712",     "manufacturer": "Bourns",     "package": "SOT-23",-    "pin_count": null,+    "pin_count": 3,     "category": "Transistors/Thyristors",     "subcategory": "TVS Diodes",-    "body_size": null,-    "parts": {},+    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588884226552827904",+    "parts": {+      "symbol": "cdsot23-sm712.kicad_sym",+      "footprint": "cdsot23-sm712.kicad_mod",+      "model_3d": "cdsot23-sm712-etched.glb",+      "model_3d_plain": "cdsot23-sm712.glb",+      "model_3d_step": "cdsot23-sm712-etched.step",+      "model_3d_step_plain": "cdsot23-sm712.step",+      "lbr": "cdsot23-sm712.lbr"+    },     "distributor_links": {       "digikey": false,       "digikey_note": "2026-10-16: no exact-MPN listing for CDSOT23-SM712 found via the digikey API.",@@ -35,31 +42,137 @@         "url": "https://www.lcsc.com/product-detail/C404012.html"       }     },-    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588884226552827904"+    "pins": [+      {+        "number": "1",+        "name": "1",+        "type": "passive",+        "description": "Protected I/O line 1. Clamps transients to pin 3 (common). VWM = 7 V from pin 3 to pin 1, VWM = 12 V from pin 1 to pin 3; VBR = 7.5 V / 13.3 V respectively. Typical junction capacitance 75 pF @ 0 V, 1 MHz. [datasheet p.1]"+      },+      {+        "number": "2",+        "name": "2",+        "type": "passive",+        "description": "Protected I/O line 2. Clamps transients to pin 3 (common). VWM = 7 V from pin 3 to pin 2, VWM = 12 V from pin 2 to pin 3; VBR = 7.5 V / 13.3 V respectively. Typical junction capacitance 75 pF @ 0 V, 1 MHz. [datasheet p.1]"+      },+      {+        "number": "3",+        "name": "3",+        "type": "passive",+        "description": "Common clamp node — the shared junction of the two internal back-to-back TVS diode stacks. Typically tied to ground / chassis / return rail so transients on pins 1 and 2 are shunted here. Asymmetric clamping: 7 V VWM toward pins 1/2, 12 V VWM from pins 1/2. [datasheet p.1]"+      }+    ],+    "provenance": {+      "factory_chain": {+        "pipeline": "adom-parts (board-derived) 0.1",+        "pins": "KiCad symbol from the source board + adom-ds2sf datasheet extraction (claude-opus-4-7)",+        "at": "2026-10-16"+      },+      "datasheet": {+        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588884226552827904",+        "pages": 4,+        "sha256": "b5618cb2c09bf814811b958d25d4ee93d7f4bb4cf3f3a968c62f3025f08190a8",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official libraries (CC-BY-SA 4.0); footprint and symbol as used on Adom boards",+      "pins": {+        "total": 3,+        "described": 3,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    },+    "models_3d": [+      {+        "file": "cdsot23-sm712.step",+        "role": "plain",+        "up": "Z",+        "units": "mm",+        "origin": "footprint origin",+        "seat": "z = 0 (PCB top surface)",+        "extents_mm": [+          2.5,+          3.0,+          1.2+        ],+        "zmin_mm": -0.0,+        "footprint_binding": "identity",+        "sha256": "16964b14f93e6c778288a0c110b35f670fab733109c26f0da7dfc07cc3350040",+        "checked": "2026-10-16",+        "checked_by": "adom-parts/partstep.py (placement inverse from the source board; centroid-matched to KiCad library models on 59 reference cases)"+      },+      {+        "file": "cdsot23-sm712-etched.step",+        "role": "eda",+        "up": "Z",+        "units": "mm",+        "origin": "footprint origin",+        "seat": "z = 0 (PCB top surface)",+        "extents_mm": [+          2.5,+          3.0,+          1.202+        ],+        "zmin_mm": -0.0,+        "footprint_binding": "identity",+        "sha256": "d52b25975ba3b79447b83cc9ae14708c01c31e7d108c8ce1c3606d02141dcfae",+        "checked": "2026-10-16",+        "checked_by": "adom-parts/partstep.py (placement inverse from the source board; centroid-matched to KiCad library models on 59 reference cases)"+      }+    ]   },-  "tags": [-    "component",-    "transistors/thyristors",-    "cdsot23-sm712",-    "board-derived",-    "staged-for-validation"+  "metadata": {+    "specs": {+      "Manufacturer": "Bourns",+      "Package": "SOT-23",+      "Category": "Transistors/Thyristors",+      "Pins": "3",+      "LCSC": "C404012"+    }+  },+  "variants": [],+  "sections": [+    "hero",+    "viewers",+    "readme",+    "breadcrumbs",+    "info"   ],   "discovery_triggers": [     "cdsot23-sm712",     "cdsot23-sm712"   ],-  "license": "CC-BY-SA-4.0",-  "visibility": {-    "public": false-  },+  "discovery_pitch": "CDSOT23-SM712 (Bourns) component page: pinout, KiCad symbol, footprint and 3D.",   "author": {     "name": "Caleb",     "email": "[email protected]"   },-  "sample_prompts": [],-  "discovery_pitch": null,-  "metadata": {},-  "created_at": "2026-10-16T23:35:07.658Z",-  "updated_at": "2026-10-16T23:35:07.658Z",-  "org": "adom"+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "verification.json",+    "cdsot23-sm712.kicad_sym",+    "cdsot23-sm712.kicad_mod",+    "cdsot23-sm712-etched.glb",+    "cdsot23-sm712-etched.step",+    "cdsot23-sm712.glb",+    "cdsot23-sm712.step",+    "cdsot23-sm712.lbr",+    "docs/hero.png",+    "docs/cdsot23-sm712-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html"+  ],+  "visibility": {+    "public": false+  } }\ No newline at end of file