# CDSOT23-SM712-L

**TECH PUBLIC** · ESD And Surge Protection (TVS/ESD) · SOT-23

CDSOT23-SM712-L from TECH PUBLIC, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | I/O 1 | passive | I/O 1 protected line; 12V TVS (VRWM 12V max, VBR 13.3V min at 1mA) toward pin 3 and 7V TVS (VRWM 7V max, VBR 7.5V min) in the reverse direction from pin 3. |
| 2 | I/O 2 | passive | I/O 2 protected line; 12V TVS (VRWM 12V max, VBR 13.3V min at 1mA) toward pin 3 and 7V TVS (VRWM 7V max, VBR 7.5V min) in the reverse direction from pin 3. |
| 3 | GND | power_in | Common ground connection shared by both asymmetrical TVS channels. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | TECH PUBLIC |
| Package | SOT-23 |
| Category | Circuit Protection |
| Pins | 3 |

## CAD (KiCad official)

- Symbol: `CDSOT23-SM712-L`
- Footprint: `Package_TO_SOT_SMD:SOT-23`
- 3D model: SOT-23 (KiCad packages3D, STEP)
- 3D model files: `cdsot23-sm712-l-etched.step` / `cdsot23-sm712-l-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `cdsot23-sm712-l.step` / `cdsot23-sm712-l.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [TECH PUBLIC datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590931349895667712) (4 pp, sha256 `22d781d0d9353f9f`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/cdsot23-sm712-l-datasheet.pdf)