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Ray Set visibility: public 37c373f 1d ago
{
  "schema_version": 1,
  "type": "component",
  "slug": "cdcvf25081pw",
  "title": "CDCVF25081PW",
  "brief": "Texas Instruments Clock Generators, PLLs, Frequency Synthesizers, TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.1.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
    "component",
    "clock-timing",
    "cdcvf25081pw",
    "factory-2.0.0",
    "extractor-text"
  ],
  "component": {
    "mpn": "CDCVF25081PW",
    "manufacturer": "Texas Instruments",
    "package": "TSSOP-16",
    "pin_count": 16,
    "category": "Clock/Timing",
    "subcategory": "Clock Generators, PLLs, Frequency Synthesizers",
    "datasheet": "https://www.ti.com/lit/ds/symlink/cdcvf25081.pdf",
    "parts": {
      "symbol": "cdcvf25081pw.kicad_sym",
      "footprint": "cdcvf25081pw.kicad_mod",
      "model_3d": "cdcvf25081pw-hero.glb",
      "model_3d_plain": "cdcvf25081pw.glb",
      "model_3d_step": "cdcvf25081pw-etched.step",
      "model_3d_step_plain": "cdcvf25081pw.step",
      "lbr": "cdcvf25081pw.lbr"
    },
    "distributor_links": {
      "lcsc": "C1535740",
      "digikey": "2156-CDCVF25081PW-ND",
      "mouser": "595-CDCVF25081PW"
    },
    "distributor_check": {
      "checked_at": "2026-10-08T14:37:36Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "2156-CDCVF25081PW-ND",
        "status": "found",
        "lifecycle": "Active"
      },
      "mouser": {
        "pn": "595-CDCVF25081PW",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "CLKIN",
        "type": "input",
        "description": "Clock input that must have a fixed frequency and phase for the PLL to acquire lock, and a stabilization time is required after power-up and valid signal application."
      },
      {
        "number": "2",
        "name": "1Y0",
        "type": "output",
        "description": "Bank 1 Y0 clock output with an integrated 25-Ω series-damping resistor."
      },
      {
        "number": "3",
        "name": "1Y1",
        "type": "output",
        "description": "Bank 1 Y1 clock output with an integrated 25-Ω series-damping resistor."
      },
      {
        "number": "4",
        "name": "VDD",
        "type": "power_in",
        "description": "3.3 V power supply for the output channels and core voltage (3 V to 3.6 V supply range per recommended operating conditions)."
      },
      {
        "number": "5",
        "name": "GND",
        "type": "power_in",
        "description": "Ground; connect to system ground."
      },
      {
        "number": "6",
        "name": "2Y0",
        "type": "output",
        "description": "Bank 2 Y0 clock output with an integrated 25-Ω series-damping resistor."
      },
      {
        "number": "7",
        "name": "2Y1",
        "type": "output",
        "description": "Bank 2 Y1 clock output with an integrated 25-Ω series-damping resistor."
      },
      {
        "number": "8",
        "name": "S2",
        "type": "input",
        "description": "Input selection pin that, together with S1, selects the input port and output source (PLL, bypassed PLL, or high-impedance) per Table 8-2."
      },
      {
        "number": "9",
        "name": "S1",
        "type": "input",
        "description": "Input selection pin that, together with S2, selects the input port and output source (PLL, bypassed PLL, or high-impedance) per Table 8-2."
      },
      {
        "number": "10",
        "name": "2Y2",
        "type": "output",
        "description": "Bank 2 Y2 clock output with an integrated 25-Ω series-damping resistor."
      },
      {
        "number": "11",
        "name": "2Y3",
        "type": "output",
        "description": "Bank 2 Y3 clock output with an integrated 25-Ω series-damping resistor."
      },
      {
        "number": "12",
        "name": "GND",
        "type": "power_in",
        "description": "Ground; connect to system ground."
      },
      {
        "number": "13",
        "name": "VDD",
        "type": "power_in",
        "description": "3.3 V power supply for the output channels and core voltage (3 V to 3.6 V supply range per recommended operating conditions)."
      },
      {
        "number": "14",
        "name": "1Y2",
        "type": "output",
        "description": "Bank 1 Y2 clock output with an integrated 25-Ω series-damping resistor."
      },
      {
        "number": "15",
        "name": "1Y3",
        "type": "output",
        "description": "Bank 1 Y3 clock output with an integrated 25-Ω series-damping resistor."
      },
      {
        "number": "16",
        "name": "FBIN",
        "type": "input",
        "description": "Feedback input to the internal PLL that must be wired to one of the outputs to complete the feedback loop for zero-delay operation."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [],
        "pages_sent": 26,
        "cost_usd": 0.0887,
        "at": "2026-10-08T14:37:18"
      },
      "datasheet": {
        "url": "https://www.ti.com/lit/ds/symlink/cdcvf25081.pdf",
        "pages": 26,
        "sha256": "9f846462bdac0c0a",
        "source_tier": "mfr"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 16,
        "described": 16,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "cdcvf25081pw.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.4,
          5,
          1.1
        ],
        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "6ad5e98224d02a427d9a6b929a28dbc158b9925fba5adec12db05079f1016948",
        "checked": "2026-10-08",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "cdcvf25081pw-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.4,
          5,
          1.1
        ],
        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "a1f3bb5d8c3213387a6e049012740c87f04ed5134e72b46061f255669061f301",
        "checked": "2026-10-08",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  },
  "metadata": {
    "specs": {
      "Manufacturer": "Texas Instruments",
      "Package": "TSSOP-16",
      "Category": "Clock/Timing",
      "Pins": "16"
    }
  },
  "variants": [],
  "sections": [
    "hero",
    "viewers",
    "readme",
    "breadcrumbs",
    "info"
  ],
  "discovery_triggers": [
    "cdcvf25081pw"
  ],
  "discovery_pitch": "CDCVF25081PW (Texas Instruments) component page: datasheet pinout, KiCad symbol, footprint and 3D.",
  "author": {
    "name": "Ray",
    "email": "[email protected]"
  },
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
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    "README.md",
    "cdcvf25081pw.kicad_sym",
    "cdcvf25081pw.kicad_mod",
    "cdcvf25081pw.glb",
    "cdcvf25081pw.step",
    "cdcvf25081pw.lbr",
    "docs/hero.png",
    "docs/cdcvf25081pw-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "cdcvf25081pw-hero.glb",
    "cdcvf25081pw-hero.overlay.json"
  ],
  "visibility": {
    "public": true
  }
}