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CDCVF2310MPWEP
Public Made by Adomby adom
Texas Instruments Clock Buffers, Drivers, Distributors, TSSOP-24. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+61@@ -0,0 +1,61 @@+# CDCVF2310MPWEP++**Texas Instruments** · Clock Buffers, Drivers, Distributors · TSSOP-24++CDCVF2310MPWEP from Texas Instruments, in a TSSOP-24. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | GND | power_in | Ground pin; the device has five GND pins (1, 6, 7, 18, 19). |+| 2 | VDD | power_in | DC power supply pin; the supply range is 2.3 V to 3.6 V. |+| 3 | 1Y0 | output | Buffered clock output of group 1; it follows CLK when 1G is high and is held low when 1G is low. |+| 4 | 1Y1 | output | Buffered clock output of group 1; it follows CLK when 1G is high and is held low when 1G is low. |+| 5 | 1Y2 | output | Buffered clock output of group 1; it follows CLK when 1G is high and is held low when 1G is low. |+| 6 | GND | power_in | Ground pin; one of the five GND pins (1, 6, 7, 18, 19). |+| 7 | GND | power_in | Ground pin; one of the five GND pins (1, 6, 7, 18, 19). |+| 8 | 1Y3 | output | Buffered clock output of group 1; it follows CLK when 1G is high and is held low when 1G is low. |+| 9 | 1Y4 | output | Buffered clock output of group 1; it follows CLK when 1G is high and is held low when 1G is low. |+| 10 | VDD | power_in | DC power supply pin; the supply range is 2.3 V to 3.6 V. |+| 11 | 1G | input | Active-high output enable for 1Y[0:4]; the outputs follow CLK while this pin is high, and changes take effect on the next CLK falling edge per the enable/disable timing. |+| 12 | 2Y4 | output | Buffered clock output of group 2; it follows CLK when 2G is high and is held low when 2G is low. |+| 13 | 2G | input | Active-high output enable for 2Y[0:4]; the outputs follow CLK while this pin is high, and changes take effect on the next CLK falling edge per the enable/disable timing. |+| 14 | VDD | power_in | DC power supply pin; the supply range is 2.3 V to 3.6 V. |+| 15 | VDD | power_in | DC power supply pin; the supply range is 2.3 V to 3.6 V. |+| 16 | 2Y3 | output | Buffered clock output of group 2; it follows CLK when 2G is high and is held low when 2G is low. |+| 17 | 2Y2 | output | Buffered clock output of group 2; it follows CLK when 2G is high and is held low when 2G is low. |+| 18 | GND | power_in | Ground pin; one of the five GND pins (1, 6, 7, 18, 19). |+| 19 | GND | power_in | Ground pin; one of the five GND pins (1, 6, 7, 18, 19). |+| 20 | 2Y1 | output | Buffered clock output of group 2; it follows CLK when 2G is high and is held low when 2G is low. |+| 21 | 2Y0 | output | Buffered clock output of group 2; it follows CLK when 2G is high and is held low when 2G is low. |+| 22 | VDD | power_in | DC power supply pin; the supply range is 2.3 V to 3.6 V. |+| 23 | VDD | power_in | DC power supply pin; the supply range is 2.3 V to 3.6 V. |+| 24 | CLK | input | Input reference clock; the clock frequency is specified up to 200 MHz at VDD = 3 V to 3.6 V and up to 170 MHz at VDD = 2.3 V to 2.7 V. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | TSSOP-24 |+| Category | Clock/Timing |+| Pins | 24 |++## CAD (KiCad official)++- Symbol: `CDCVF2310MPWEP`+- Footprint: `Package_SO:TSSOP-24_4.4x7.8mm_P0.65mm`+- 3D model: TSSOP-24 (KiCad packages3D, STEP)+- 3D model files: `cdcvf2310mpwep-etched.step` / `cdcvf2310mpwep-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `cdcvf2310mpwep.step` / `cdcvf2310mpwep.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/cdcvf2310-ep) (17 pp, sha256 `a293ccc324fb9cf1`, retrieved 2026-10-08, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/cdcvf2310mpwep-datasheet.pdf)
page.jsonadded+296@@ -0,0 +1,296 @@+{+ "slug": "cdcvf2310mpwep",+ "version": "0.1.0",+ "type": "component",+ "description": "Texas Instruments Clock Buffers, Drivers, Distributors, TSSOP-24. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "clock-timing",+ "cdcvf2310mpwep",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "cdcvf2310mpwep.kicad_sym",+ "cdcvf2310mpwep.kicad_mod",+ "cdcvf2310mpwep.glb",+ "cdcvf2310mpwep.step",+ "cdcvf2310mpwep.lbr",+ "docs/hero.png",+ "docs/cdcvf2310mpwep-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "cdcvf2310mpwep-hero.glb",+ "cdcvf2310mpwep-hero.overlay.json"+ ],+ "component": {+ "mpn": "CDCVF2310MPWEP",+ "manufacturer": "Texas Instruments",+ "package": "TSSOP-24",+ "pin_count": 24,+ "category": "Clock/Timing",+ "subcategory": "Clock Buffers, Drivers, Distributors",+ "datasheet": "https://www.ti.com/cn/lit/gpn/cdcvf2310-ep",+ "parts": {+ "symbol": "cdcvf2310mpwep.kicad_sym",+ "footprint": "cdcvf2310mpwep.kicad_mod",+ "model_3d": "cdcvf2310mpwep-hero.glb",+ "model_3d_plain": "cdcvf2310mpwep.glb",+ "model_3d_step": "cdcvf2310mpwep-etched.step",+ "model_3d_step_plain": "cdcvf2310mpwep.step",+ "lbr": "cdcvf2310mpwep.lbr"+ },+ "distributor_links": {+ "lcsc": "C2876934",+ "digikey": "296-50606-ND",+ "mouser": "595-CDCVF2310MPWEP"+ },+ "distributor_check": {+ "checked_at": "2026-10-08T03:41:38Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "296-50606-ND",+ "status": "found",+ "lifecycle": "Active"+ },+ "mouser": {+ "pn": "595-CDCVF2310MPWEP",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "GND",+ "type": "power_in",+ "description": "Ground pin; the device has five GND pins (1, 6, 7, 18, 19)."+ },+ {+ "number": "2",+ "name": "VDD",+ "type": "power_in",+ "description": "DC power supply pin; the supply range is 2.3 V to 3.6 V."+ },+ {+ "number": "3",+ "name": "1Y0",+ "type": "output",+ "description": "Buffered clock output of group 1; it follows CLK when 1G is high and is held low when 1G is low."+ },+ {+ "number": "4",+ "name": "1Y1",+ "type": "output",+ "description": "Buffered clock output of group 1; it follows CLK when 1G is high and is held low when 1G is low."+ },+ {+ "number": "5",+ "name": "1Y2",+ "type": "output",+ "description": "Buffered clock output of group 1; it follows CLK when 1G is high and is held low when 1G is low."+ },+ {+ "number": "6",+ "name": "GND",+ "type": "power_in",+ "description": "Ground pin; one of the five GND pins (1, 6, 7, 18, 19)."+ },+ {+ "number": "7",+ "name": "GND",+ "type": "power_in",+ "description": "Ground pin; one of the five GND pins (1, 6, 7, 18, 19)."+ },+ {+ "number": "8",+ "name": "1Y3",+ "type": "output",+ "description": "Buffered clock output of group 1; it follows CLK when 1G is high and is held low when 1G is low."+ },+ {+ "number": "9",+ "name": "1Y4",+ "type": "output",+ "description": "Buffered clock output of group 1; it follows CLK when 1G is high and is held low when 1G is low."+ },+ {+ "number": "10",+ "name": "VDD",+ "type": "power_in",+ "description": "DC power supply pin; the supply range is 2.3 V to 3.6 V."+ },+ {+ "number": "11",+ "name": "1G",+ "type": "input",+ "description": "Active-high output enable for 1Y[0:4]; the outputs follow CLK while this pin is high, and changes take effect on the next CLK falling edge per the enable/disable timing."+ },+ {+ "number": "12",+ "name": "2Y4",+ "type": "output",+ "description": "Buffered clock output of group 2; it follows CLK when 2G is high and is held low when 2G is low."+ },+ {+ "number": "13",+ "name": "2G",+ "type": "input",+ "description": "Active-high output enable for 2Y[0:4]; the outputs follow CLK while this pin is high, and changes take effect on the next CLK falling edge per the enable/disable timing."+ },+ {+ "number": "14",+ "name": "VDD",+ "type": "power_in",+ "description": "DC power supply pin; the supply range is 2.3 V to 3.6 V."+ },+ {+ "number": "15",+ "name": "VDD",+ "type": "power_in",+ "description": "DC power supply pin; the supply range is 2.3 V to 3.6 V."+ },+ {+ "number": "16",+ "name": "2Y3",+ "type": "output",+ "description": "Buffered clock output of group 2; it follows CLK when 2G is high and is held low when 2G is low."+ },+ {+ "number": "17",+ "name": "2Y2",+ "type": "output",+ "description": "Buffered clock output of group 2; it follows CLK when 2G is high and is held low when 2G is low."+ },+ {+ "number": "18",+ "name": "GND",+ "type": "power_in",+ "description": "Ground pin; one of the five GND pins (1, 6, 7, 18, 19)."+ },+ {+ "number": "19",+ "name": "GND",+ "type": "power_in",+ "description": "Ground pin; one of the five GND pins (1, 6, 7, 18, 19)."+ },+ {+ "number": "20",+ "name": "2Y1",+ "type": "output",+ "description": "Buffered clock output of group 2; it follows CLK when 2G is high and is held low when 2G is low."+ },+ {+ "number": "21",+ "name": "2Y0",+ "type": "output",+ "description": "Buffered clock output of group 2; it follows CLK when 2G is high and is held low when 2G is low."+ },+ {+ "number": "22",+ "name": "VDD",+ "type": "power_in",+ "description": "DC power supply pin; the supply range is 2.3 V to 3.6 V."+ },+ {+ "number": "23",+ "name": "VDD",+ "type": "power_in",+ "description": "DC power supply pin; the supply range is 2.3 V to 3.6 V."+ },+ {+ "number": "24",+ "name": "CLK",+ "type": "input",+ "description": "Input reference clock; the clock frequency is specified up to 200 MHz at VDD = 3 V to 3.6 V and up to 170 MHz at VDD = 2.3 V to 2.7 V."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: Pin numbers and names were cross-checked between the pin diagram on page 1 (text extraction) and the"+ ],+ "pages_sent": 17,+ "cost_usd": 0.0783,+ "at": "2026-10-08T03:41:18"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/cdcvf2310-ep",+ "pages": 17,+ "sha256": "a293ccc324fb9cf1",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 24,+ "described": 24,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "cdcvf2310mpwep.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6.4,+ 7.8,+ 0.97+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "706322f42d9793ebf28d5b80100a68bfa8769998a00b78acadf7af937fc1454f",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "cdcvf2310mpwep-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6.4,+ 7.8,+ 0.97+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "7230f51e5553ceaa0ad053d5eb97ab20c8e118d2519b845f26634b79432612ca",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}