component
CDCM6208V2GRGZR
Public Made by Adomby adom
Texas Instruments Clock Generators / Frequency Synthesizers / PLL, VQFN-48-EP(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
Ray
Publish 0.1.0
175d471
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{
"slug": "cdcm6208v2grgzr",
"version": "0.1.0",
"type": "component",
"description": "Texas Instruments Clock Generators / Frequency Synthesizers / PLL, VQFN-48-EP(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"tags": [
"component",
"rtc-clock chip",
"cdcm6208v2grgzr",
"factory-2.0.0",
"extractor-text"
],
"dependencies": {},
"hero": {
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"cdcm6208v2grgzr.step",
"cdcm6208v2grgzr.lbr",
"docs/hero.png",
"docs/cdcm6208v2grgzr-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html",
"cdcm6208v2grgzr-hero.glb",
"cdcm6208v2grgzr-hero.overlay.json",
"cdcm6208v2grgzr-etched.glb"
],
"component": {
"mpn": "CDCM6208V2GRGZR",
"manufacturer": "Texas Instruments",
"package": "VQFN-48-EP(7x7)",
"pin_count": 49,
"category": "RTC/Clock Chip",
"subcategory": "Clock Generators / Frequency Synthesizers / PLL",
"datasheet": "https://www.ti.com/lit/ds/symlink/cdcm6208v2grgzr.pdf",
"parts": {
"symbol": "cdcm6208v2grgzr.kicad_sym",
"footprint": "cdcm6208v2grgzr.kicad_mod",
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"model_3d_plain": "cdcm6208v2grgzr-etched.glb",
"model_3d_step": "cdcm6208v2grgzr-etched.step",
"model_3d_step_plain": "cdcm6208v2grgzr.step",
"lbr": "cdcm6208v2grgzr.lbr"
},
"distributor_links": {
"lcsc": "C2867632",
"digikey": "296-51011-2-ND",
"mouser": "595-CDCM6208V2GRGZR"
},
"distributor_check": {
"checked_at": "2026-10-28T16:05:30Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": "296-51011-2-ND",
"status": "found"
},
"mouser": {
"pn": "595-CDCM6208V2GRGZR",
"status": "found"
}
},
"pins": [
{
"number": "1",
"name": "SI_MODE0",
"type": "input",
"description": "Serial interface or pin mode select bit 0 (LVCMOS input with 50kΩ pull-down); SI_MODE[1:0] = 00 selects SPI, 01 selects I2C, 10 selects pin mode."
},
{
"number": "2",
"name": "SDI/SDA/PIN1",
"type": "bidirectional",
"description": "SPI serial data input (SDI), I2C serial data (SDA, bidirectional open-drain requiring a pull-up in I2C mode), or control pin 1 in pin mode."
},
{
"number": "3",
"name": "SDO/AD0/PIN2",
"type": "bidirectional",
"description": "SPI serial data output (SDO), I2C address offset bit 0 input (AD0), or control pin 2 in pin mode."
},
{
"number": "4",
"name": "SCS/AD1/PIN3",
"type": "input",
"description": "SPI latch enable (SCS), I2C address offset bit 1 input (AD1), or control pin 3 in pin mode (LVCMOS, no pull resistor)."
},
{
"number": "5",
"name": "SCL/PIN4",
"type": "input",
"description": "SPI/I2C clock input (SCL) or control pin 4 in pin mode (LVCMOS, no pull resistor)."
},
{
"number": "6",
"name": "REF_SEL",
"type": "input",
"description": "Manual reference selection for the PLL: REF_SEL low (≤ VIL) selects PRI_REF and high (≥ VIH) selects SEC_REF when Reg 4.12 = 1; 50kΩ pull-up."
},
{
"number": "7",
"name": "VDD_PRI_REF",
"type": "power_in",
"description": "Analog supply for the primary reference inputs, set to 1.8 V, 2.5 V or 3.3 V, or connected to VDD_SEC_REF."
},
{
"number": "8",
"name": "PRI_REFP",
"type": "input",
"description": "Universal primary reference input, positive terminal."
},
{
"number": "9",
"name": "PRI_REFN",
"type": "input",
"description": "Universal primary reference input, negative terminal."
},
{
"number": "10",
"name": "VDD_SEC_REF",
"type": "power_in",
"description": "Analog supply for the secondary reference inputs, set to 1.8 V, 2.5 V or 3.3 V, or connected to VDD_PRI_REF (if the secondary input buffer is disabled, it may be connected to GND)."
},
{
"number": "11",
"name": "SEC_REFP",
"type": "input",
"description": "Universal secondary reference input, positive terminal."
},
{
"number": "12",
"name": "SEC_REFN",
"type": "input",
"description": "Universal secondary reference input, negative terminal."
},
{
"number": "13",
"name": "VDD_Y0_Y1",
"type": "power_in",
"description": "Analog supply for outputs 0 and 1, set to 1.8 V, 2.5 V or 3.3 V (2 pins)."
},
{
"number": "14",
"name": "Y0_P",
"type": "output",
"description": "Universal output 0, positive terminal."
},
{
"number": "15",
"name": "Y0_N",
"type": "output",
"description": "Universal output 0, negative terminal."
},
{
"number": "16",
"name": "Y1_N",
"type": "output",
"description": "Universal output 1, negative terminal."
},
{
"number": "17",
"name": "Y1_P",
"type": "output",
"description": "Universal output 1, positive terminal."
},
{
"number": "18",
"name": "VDD_Y0_Y1",
"type": "power_in",
"description": "Analog supply for outputs 0 and 1, set to 1.8 V, 2.5 V or 3.3 V (2 pins)."
},
{
"number": "19",
"name": "VDD_Y2_Y3",
"type": "power_in",
"description": "Analog supply for outputs 2 and 3, set to 1.8 V, 2.5 V or 3.3 V (2 pins)."
},
{
"number": "20",
"name": "Y2_P",
"type": "output",
"description": "Universal output 2, positive terminal."
},
{
"number": "21",
"name": "Y2_N",
"type": "output",
"description": "Universal output 2, negative terminal."
},
{
"number": "22",
"name": "Y3_N",
"type": "output",
"description": "Universal output 3, negative terminal."
},
{
"number": "23",
"name": "Y3_P",
"type": "output",
"description": "Universal output 3, positive terminal."
},
{
"number": "24",
"name": "VDD_Y2_Y3",
"type": "power_in",
"description": "Analog supply for outputs 2 and 3, set to 1.8 V, 2.5 V or 3.3 V (2 pins)."
},
{
"number": "25",
"name": "Y4_N",
"type": "output",
"description": "Universal output 4, negative terminal."
},
{
"number": "26",
"name": "Y4_P",
"type": "output",
"description": "Universal output 4, positive terminal."
},
{
"number": "27",
"name": "VDD_Y4",
"type": "power_in",
"description": "Analog supply for output 4, set to 1.8 V, 2.5 V or 3.3 V."
},
{
"number": "28",
"name": "Y5_N",
"type": "output",
"description": "Universal output 5, negative terminal."
},
{
"number": "29",
"name": "Y5_P",
"type": "output",
"description": "Universal output 5, positive terminal."
},
{
"number": "30",
"name": "VDD_Y5",
"type": "power_in",
"description": "Analog supply for output 5, set to 1.8 V, 2.5 V or 3.3 V."
},
{
"number": "31",
"name": "VDD_Y6",
"type": "power_in",
"description": "Analog supply for output 6, set to 1.8 V, 2.5 V or 3.3 V."
},
{
"number": "32",
"name": "Y6_P",
"type": "output",
"description": "Universal output 6, positive terminal."
},
{
"number": "33",
"name": "Y6_N",
"type": "output",
"description": "Universal output 6, negative terminal."
},
{
"number": "34",
"name": "VDD_Y7",
"type": "power_in",
"description": "Analog supply for output 7, set to 1.8 V, 2.5 V or 3.3 V."
},
{
"number": "35",
"name": "Y7_P",
"type": "output",
"description": "Universal output 7, positive terminal."
},
{
"number": "36",
"name": "Y7_N",
"type": "output",
"description": "Universal output 7, negative terminal."
},
{
"number": "37",
"name": "VDD_PLL1",
"type": "power_in",
"description": "Analog power supply connection for the PLL."
},
{
"number": "38",
"name": "VDD_PLL2",
"type": "power_in",
"description": "Analog power supply for the PLL; sensitive to power supply noise and may be combined with VDD_VCO."
},
{
"number": "39",
"name": "VDD_VCO",
"type": "power_in",
"description": "Analog power supply for the PLL/VCO; sensitive to power supply noise and may be combined with VDD_PLL2."
},
{
"number": "40",
"name": "REG_CAP",
"type": "passive",
"description": "Regulator capacitor; connect a 10 µF capacitor with ESR below 1 Ω to GND at frequencies above 100 kHz."
},
{
"number": "41",
"name": "ELF",
"type": "passive",
"description": "External loop filter pin for the PLL."
},
{
"number": "42",
"name": "SYNCN",
"type": "input",
"description": "Active-low synchronization input: outputs synchronize on a low-to-high transition, and SYNCN held low disables all outputs (50kΩ pull-up)."
},
{
"number": "43",
"name": "PDN",
"type": "input",
"description": "Active-low power-down input (50kΩ pull-up): when low the device is disabled with minimized current, and exiting power-down resets the device and defaults all registers."
},
{
"number": "44",
"name": "RESETN/PWR",
"type": "input",
"description": "In SPI/I2C mode, active-low external reset (VIL = reset, registers retained); in pin mode it sets core and I/O supply, 0 = 1.8 V and 1 = 2.5/3.3 V (50kΩ pull-up)."
},
{
"number": "45",
"name": "STATUS1/PIN0",
"type": "bidirectional",
"description": "Status output 1 in SPI/I2C modes (LVCMOS) or control pin 0 in pin mode."
},
{
"number": "46",
"name": "STATUS0",
"type": "output",
"description": "LVCMOS status output 0; mapped status signals are selected via register bits (see Table 6)."
},
{
"number": "47",
"name": "SI_MODE1",
"type": "input",
"description": "Serial interface or pin mode select bit 1 (LVCMOS input with 50kΩ pull-up); see SI_MODE0 for the mode encoding."
},
{
"number": "48",
"name": "DVDD",
"type": "power_in",
"description": "Digital power supply; also the reference supply voltage for all control inputs, which must match the expected control input signal swing."
},
{
"number": "49",
"name": "EP",
"type": "passive",
"description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: The GND PAD (exposed thermal pad, ground) is listed in the pin table without a printed pin number, s; Pin numbers and names were taken from the Pin Functions table on pages 3 to 5 because the page 3 pin"
],
"pages_sent": 20,
"cost_usd": 0.049,
"at": "2026-10-28T16:05:12"
},
"datasheet": {
"url": "https://www.ti.com/lit/ds/symlink/cdcm6208v2grgzr.pdf",
"pages": 89,
"sha256": "c0a705671fd73450",
"source_tier": "mfr"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 49,
"described": 49,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
{
"file": "cdcm6208v2grgzr.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
7.0,
7.0,
0.77
],
"zmin_mm": 0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "f2b38b0b4bf967c77e683e8d4599608b9f0503055ec535b93c4ebb5d0163e916",
"checked": "2026-10-28",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "cdcm6208v2grgzr-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
7.0,
7.0,
0.77
],
"zmin_mm": 0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "23c419e3735a3bbf7479369af2715b20f1710a2b5e09386955b460c6169749fe",
"checked": "2026-10-28",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
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}
}