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CDCM61001RHBT

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Texas Instruments Clock Generators / Frequency Synthesizers / PLL, VQFN-32-EP(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentrtc-clock chipcdcm61001rhbtfactory-2.0.0extractor-text

Verified CDCM61001RHBT

by Ray · last 5 Nov 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

5 Nov 2026RayPublished by the parts factory: tier mfr, 33 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: CDCM61001RHBT · VQFN-32-EP(5x5) · 33 pins
  • ✓copper: 33 copper pads, none touching another net
  • ✓datasheet: all 33 pin names found in the 36-page datasheet
  • ✓distributor: lcsc C2651222, digikey 296-24192-2-ND, mouser 595-CDCM61001RHBT
  • ✓family: QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-8wtw7p_s/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 33 pins = 33 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 33 pins agree
  • ✓symbol_text: no pin names collide
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ cdcm61001rhbt.kicad_sym✓ cdcm61001rhbt.kicad_mod✓ cdcm61001rhbt.step
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CDCM61001RHBT

Texas Instruments · Clock Generators / Frequency Synthesizers / PLL · VQFN-32-EP(5x5)

CDCM61001RHBT from Texas Instruments, in a VQFN-32-EP(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 NC unconnected No connection; this pin is not internally connected.
2 NC unconnected No connection; this pin is not internally connected.
3 NC unconnected No connection; this pin is not internally connected.
4 VCC_OUT power_in 3.3-V supply for the output buffer.
5 OUTN output Differential output pair (negative leg) or one of two single-ended outputs.
6 OUTP output Differential output pair (positive leg) or one of two single-ended outputs.
7 CE input Chip enable control pin with internal pull-up (see Table 7 of the datasheet).
8 NC unconnected No connection; this pin is not internally connected.
9 VCC_VCO power_in 3.3-V supply for the internal VCO.
10 OS1 input Output type select control pin with internal pull-up (see Table 6 of the datasheet).
11 OS0 input Output type select control pin with internal pull-up (see Table 6 of the datasheet).
12 RSTN input Device reset, active low, with internal pull-up (see Table 8 of the datasheet).
13 OD0 input Output divider control pin with internal pull-up (see Table 5 of the datasheet).
14 OD1 input Output divider control pin with internal pull-up (see Table 5 of the datasheet).
15 OD2 input Output divider control pin with internal pull-up (see Table 5 of the datasheet).
16 VCC_PLL2 power_in 3.3-V supply for the PLL circuitry.
17 REG_CAP2 output Capacitor connection for the internal regulator; connect to a 10-μF Y5V capacitor to GND.
18 VCC_PLL1 power_in 3.3-V supply for the PLL circuitry.
19 REG_CAP1 output Capacitor connection for the internal regulator; connect to a 10-μF Y5V capacitor to GND.
20 VCC_IN power_in 3.3-V supply for the input buffers.
21 XIN input Parallel resonant crystal or LVCMOS reference input.
22 GND1 power_in Additional ground for the device; shorted on-chip to GND.
23 OSC_OUT output Bypass LVCMOS output.
24 NC unconnected No connection; this pin is not internally connected.
25 PR0 input Prescaler and feedback divider control pin with internal pull-up (see Table 4 of the datasheet).
26 PR1 input Prescaler and feedback divider control pin with internal pull-up (see Table 4 of the datasheet).
27 NC unconnected No connection; this pin is not internally connected.
28 NC unconnected No connection; this pin is not internally connected.
29 NC unconnected No connection; this pin is not internally connected.
30 NC unconnected No connection; this pin is not internally connected.
31 NC unconnected No connection; this pin is not internally connected.
32 NC unconnected No connection; this pin is not internally connected.
33 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package VQFN-32-EP(5x5)
Category RTC/Clock Chip
Pins 33

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage range VCC_OUT, VCC_PLL1, VCC_PLL2, VCC_VCO, VCC_IN -0.5 4.6 V 3
Input voltage range VIN -0.5 V max printed as (VCC_IN + 0.5) 3
Output voltage range VOUT -0.5 V max printed as (VCC_OUT + 0.5) 3
Input current IIN 20 mA 3
Output current IOUT 50 mA 3
Storage temperature range TSTG -65 150 °C 3
Output supply voltage VCC_OUT 3 3.3 3.6 V 3
PLL supply voltage VCC_PLL1 3 3.3 3.6 V 3
On-chip VCO supply voltage VCC_VCO 3 3.3 3.6 V 3
Input supply voltage VCC_IN 3 3.3 3.6 V 3
Ambient temperature TA -40 85 °C 3
Thermal resistance, junction-to-ambient θJA 35 °C/W 0 LFM, JESD 51 / JEDEC 2S2P board 3
Thermal resistance, junction-to-pad θJP 4 °C/W 3
Input high current IIH 200 μA VCC = 3.6 V, VIL = 0 V 4
Input low current IIL -200 μA VCC = 3 V, VIH = 3.6 V 4
Bypass output frequency fOSC_OUT 21.875 28.47 MHz LVCMOS output characteristics 4
Output frequency fOUT 43.75 250 MHz LVCMOS output 4
Output low voltage VOL 0.3 V VCC = min to max, IOL = 100 μA 4
RMS phase jitter tRJIT 0.85 ps, RMS 250 MHz (10 kHz to 20 MHz) 4
Output rise/fall slew rate tSLEW-RATE 2.4 V/ns 20% to 80% 4
Output duty cycle ODC 45 55 % 4
Device current, LVCMOS ICC 95 110 mA fIN = 25 MHz, fOUT = 250 MHz, CL = 5 pF 4
Output frequency fOUT 43.75 683.264 MHz LVPECL output 4
Differential output voltage /VOD/ 0.6 1.23 V LVPECL output 4
RMS phase jitter tRJIT 0.77 ps, RMS 625 MHz (10 kHz to 20 MHz) 4
Output rise/fall time tR/tF 175 ps 20% to 80% 4
Device current, LVPECL ICC 100 115 mA fIN = 25 MHz, fOUT = 625 MHz 4
Differential output voltage /VOD/ 0.247 0.454 V LVDS output 4
VDD magnitude change ΔVOD 50 mV 4
Common-mode voltage VOS 1.125 1.375 V LVDS output 4
VOS magnitude change ΔVOS 50 mV 4
RMS phase jitter tRJIT 0.73 ps, RMS 625 MHz (10 kHz to 20 MHz) 4
Output rise/fall time tR/tF 255 ps 20% to 80% 4
Device current, LVDS ICC 90 105 mA fIN = 25 MHz, fOUT = 625 MHz 4
Frequency 21.875 28.47 MHz crystal characteristics 6
Equivalent series resistance (ESR) ESR 50 Ω crystal characteristics 6
Drive level 0.1 1 mW crystal characteristics 6
Maximum shunt capacitance C0 7 pF crystal characteristics 6
Input pull-up resistor RPULLUP 150 kΩ 8

CAD (KiCad official)

  • Symbol: CDCM61001RHBT
  • Footprint: Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm
  • 3D model: VQFN-32-EP(5x5) (KiCad packages3D, STEP)
  • 3D model files: cdcm61001rhbt-etched.step / cdcm61001rhbt-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cdcm61001rhbt.step / cdcm61001rhbt.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (36 pp, sha256 ee7411bbf510cdd5, retrieved 2026-11-05, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF