component

CDCLVP1204RGTR

Public Made by Adom

by adom

Texas Instruments Buffer/Driver/Transceiver, VQFN-16-EP(3x3). Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
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docs cdclvp1204rgtr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers cdclvp1204rgtr: viewers · Ray
cdclvp1204rgtr-etched.fit.json cdclvp1204rgtr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
cdclvp1204rgtr-etched.glb cdclvp1204rgtr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
cdclvp1204rgtr-etched.step cdclvp1204rgtr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
cdclvp1204rgtr.glb Publish 0.1.0 · Ray
cdclvp1204rgtr.kicad_mod Publish 0.1.0 · Ray
cdclvp1204rgtr.kicad_sym Publish 0.1.0 · Ray
cdclvp1204rgtr.lbr Publish 0.1.0 · Ray
cdclvp1204rgtr.step Publish 0.1.0 · Ray
package.json Publish 0.1.0 · Ray
page.json cdclvp1204rgtr: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray
README.md cdclvp1204rgtr: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray

CDCLVP1204RGTR

Texas Instruments · Buffer/Driver/Transceiver · VQFN-16-EP(3x3)

CDCLVP1204RGTR from Texas Instruments, in a VQFN-16-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND power_in Device ground. Thermal pad must also be soldered to ground.
2 IN_SEL input MUX select input for input choice. Internal pulldown. IN_SEL=0 selects INP0/INN0; IN_SEL=1 selects INP1/INN1.
3 INP1 input Redundant differential clock input pair (positive) or single-ended input. Accepts LVPECL, LVDS, or LVCMOS/LVTTL. Unused input pair can be left floating.
4 INN1 input Redundant differential clock input pair (negative) or single-ended input. Accepts LVPECL, LVDS, or LVCMOS/LVTTL. Unused input pair can be left floating.
5 VCC power_in 3.3-V supply for the device. Recommended operating range 2.375 V to 3.6 V (nom 2.5/3.3 V).
6 INP0 input Differential clock input pair (positive) or single-ended input. Accepts LVPECL, LVDS, or LVCMOS/LVTTL. Unused input pair can be left floating.
7 INN0 input Differential clock input pair (negative) or single-ended input. Accepts LVPECL, LVDS, or LVCMOS/LVTTL. Unused input pair can be left floating.
8 VAC_REF output Bias voltage output for capacitive-coupled inputs. Do not use VAC_REF at VCC < 3 V. If used, recommend a 0.1-uF capacitor to GND. Output current limited to 2 mA.
9 OUTP0 output Differential LVPECL output pair no. 0 (positive). Unused output pair can be left floating.
10 OUTN0 output Differential LVPECL output pair no. 0 (negative). Unused output pair can be left floating.
11 OUTP1 output Differential LVPECL output pair no. 1 (positive). Unused output pair can be left floating.
12 OUTN1 output Differential LVPECL output pair no. 1 (negative). Unused output pair can be left floating.
13 OUTP2 output Differential LVPECL output pair no. 2 (positive). Unused output pair can be left floating.
14 OUTN2 output Differential LVPECL output pair no. 2 (negative). Unused output pair can be left floating.
15 OUTP3 output Differential LVPECL output pair no. 3 (positive). Unused output pair can be left floating.
16 OUTN3 output Differential LVPECL output pair no. 3 (negative). Unused output pair can be left floating.
17 GND (Thermal Pad) power_in Exposed thermal pad on package bottom. Must be soldered to ground for proper thermal and electrical operation. Connect to GND with vias for heat dissipation.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package VQFN-16-EP(3x3)
Category Logic
Pins 17

Ordering variants

Same part, different packaging or reel option.

  • CDCLVP1204RGTR
  • CDCLVP1204RGTRRGTT

CAD (KiCad official)

  • Symbol: CDCLVP1204RGTR
  • Footprint: Package_DFN_QFN:QFN-16-1EP_3x3mm_P0.5mm_EP1.7x1.7mm
  • 3D model: VQFN-16-EP(3x3) (KiCad packages3D, STEP)
  • 3D model files: cdclvp1204rgtr-etched.step / cdclvp1204rgtr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cdclvp1204rgtr.step / cdclvp1204rgtr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (33 pp, sha256 cf24994b48d76c7e, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF