component
CDCLVP1204RGTR
Public Made by Adomby adom
Texas Instruments Buffer/Driver/Transceiver, VQFN-16-EP(3x3). Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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page.json+180−8@@ -1,13 +1,190 @@ {+ "schema_version": 1,+ "type": "component", "slug": "cdclvp1204rgtr",+ "title": "CDCLVP1204RGTR",+ "brief": "Texas Instruments Buffer/Driver/Transceiver, VQFN-16-EP(3x3). Datasheet-verified pinout, KiCad symbol/footprint/3D.", "version": "0.1.0",- "type": "component",- "description": "Texas Instruments Buffer/Driver/Transceiver, VQFN-16-EP(3x3). Datasheet-verified pinout, KiCad symbol/footprint/3D.",+ "license": "CC-BY-SA-4.0", "tags": [ "component", "logic", "cdclvp1204rgtr" ],+ "component": {+ "mpn": "CDCLVP1204RGTR",+ "manufacturer": "Texas Instruments",+ "package": "VQFN-16-EP(3x3)",+ "pin_count": 17,+ "category": "Logic",+ "subcategory": "Buffer/Driver/Transceiver",+ "datasheet": "https://www.ti.com/lit/ds/symlink/cdclvp1204.pdf",+ "parts": {+ "symbol": "cdclvp1204rgtr.kicad_sym",+ "footprint": "cdclvp1204rgtr.kicad_mod",+ "model_3d": "cdclvp1204rgtr.glb",+ "model_3d_step": "cdclvp1204rgtr.step",+ "lbr": "cdclvp1204rgtr.lbr"+ },+ "distributor_links": {},+ "pins": [+ {+ "number": "1",+ "name": "GND",+ "type": "power_in",+ "description": "Device ground. Thermal pad must also be soldered to ground."+ },+ {+ "number": "2",+ "name": "IN_SEL",+ "type": "input",+ "description": "MUX select input for input choice. Internal pulldown. IN_SEL=0 selects INP0/INN0; IN_SEL=1 selects INP1/INN1."+ },+ {+ "number": "3",+ "name": "INP1",+ "type": "input",+ "description": "Redundant differential clock input pair (positive) or single-ended input. Accepts LVPECL, LVDS, or LVCMOS/LVTTL. Unused input pair can be left floating."+ },+ {+ "number": "4",+ "name": "INN1",+ "type": "input",+ "description": "Redundant differential clock input pair (negative) or single-ended input. Accepts LVPECL, LVDS, or LVCMOS/LVTTL. Unused input pair can be left floating."+ },+ {+ "number": "5",+ "name": "VCC",+ "type": "power_in",+ "description": "3.3-V supply for the device. Recommended operating range 2.375 V to 3.6 V (nom 2.5/3.3 V)."+ },+ {+ "number": "6",+ "name": "INP0",+ "type": "input",+ "description": "Differential clock input pair (positive) or single-ended input. Accepts LVPECL, LVDS, or LVCMOS/LVTTL. Unused input pair can be left floating."+ },+ {+ "number": "7",+ "name": "INN0",+ "type": "input",+ "description": "Differential clock input pair (negative) or single-ended input. Accepts LVPECL, LVDS, or LVCMOS/LVTTL. Unused input pair can be left floating."+ },+ {+ "number": "8",+ "name": "VAC_REF",+ "type": "output",+ "description": "Bias voltage output for capacitive-coupled inputs. Do not use VAC_REF at VCC < 3 V. If used, recommend a 0.1-uF capacitor to GND. Output current limited to 2 mA."+ },+ {+ "number": "9",+ "name": "OUTP0",+ "type": "output",+ "description": "Differential LVPECL output pair no. 0 (positive). Unused output pair can be left floating."+ },+ {+ "number": "10",+ "name": "OUTN0",+ "type": "output",+ "description": "Differential LVPECL output pair no. 0 (negative). Unused output pair can be left floating."+ },+ {+ "number": "11",+ "name": "OUTP1",+ "type": "output",+ "description": "Differential LVPECL output pair no. 1 (positive). Unused output pair can be left floating."+ },+ {+ "number": "12",+ "name": "OUTN1",+ "type": "output",+ "description": "Differential LVPECL output pair no. 1 (negative). Unused output pair can be left floating."+ },+ {+ "number": "13",+ "name": "OUTP2",+ "type": "output",+ "description": "Differential LVPECL output pair no. 2 (positive). Unused output pair can be left floating."+ },+ {+ "number": "14",+ "name": "OUTN2",+ "type": "output",+ "description": "Differential LVPECL output pair no. 2 (negative). Unused output pair can be left floating."+ },+ {+ "number": "15",+ "name": "OUTP3",+ "type": "output",+ "description": "Differential LVPECL output pair no. 3 (positive). Unused output pair can be left floating."+ },+ {+ "number": "16",+ "name": "OUTN3",+ "type": "output",+ "description": "Differential LVPECL output pair no. 3 (negative). Unused output pair can be left floating."+ },+ {+ "number": "17",+ "name": "GND (Thermal Pad)",+ "type": "power_in",+ "description": "Exposed thermal pad on package bottom. Must be soldered to ground for proper thermal and electrical operation. Connect to GND with vias for heat dissipation."+ }+ ],+ "provenance": {+ "extractor": "ds2sf",+ "datasheet": {+ "url": "https://www.ti.com/lit/ds/symlink/cdclvp1204.pdf",+ "pages": 33,+ "sha256": "cf24994b48d76c7e",+ "source_tier": "mfr"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 17,+ "described": 17,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "metadata": {+ "specs": {+ "Manufacturer": "Texas Instruments",+ "Package": "VQFN-16-EP(3x3)",+ "Category": "Logic",+ "Pins": "17"+ }+ },+ "variants": [+ {+ "mpn": "CDCLVP1204RGTR",+ "kind": "packaging"+ },+ {+ "mpn": "CDCLVP1204RGTRRGTT",+ "kind": "packaging"+ }+ ],+ "sections": [+ "hero",+ "viewers",+ "readme",+ "breadcrumbs",+ "info"+ ],+ "discovery_triggers": [+ "cdclvp1204rgtr"+ ],+ "discovery_pitch": "CDCLVP1204RGTR (Texas Instruments) component page with datasheet-verified CAD.",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }, "dependencies": {}, "hero": { "type": "image",@@ -25,10 +202,5 @@ "docs/cdclvp1204rgtr-datasheet.pdf", "viewers/symbol.html", "viewers/footprint.html"- ],- "visibility": "public",- "author": {- "name": "Ray",- "email": "[email protected]"- }+ ] }