CDCLVC1110PWR

{
  "slug": "cdclvc1110pwr",
  "version": "0.1.0",
  "type": "component",
  "description": "Texas Instruments Clock Buffers, Drivers, Distributors, TSSOP-20. Datasheet-verified pinout, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "clock-timing",
    "cdclvc1110pwr",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "cdclvc1110pwr.kicad_sym",
    "cdclvc1110pwr.kicad_mod",
    "cdclvc1110pwr.glb",
    "cdclvc1110pwr.step",
    "cdclvc1110pwr.lbr",
    "docs/hero.png",
    "docs/cdclvc1110pwr-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html"
  ],
  "component": {
    "mpn": "CDCLVC1110PWR",
    "manufacturer": "Texas Instruments",
    "package": "TSSOP-20",
    "pin_count": 20,
    "category": "Clock/Timing",
    "subcategory": "Clock Buffers, Drivers, Distributors",
    "datasheet": "https://www.ti.com/lit/ds/symlink/cdclvc1110.pdf",
    "parts": {
      "symbol": "cdclvc1110pwr.kicad_sym",
      "footprint": "cdclvc1110pwr.kicad_mod",
      "model_3d": "cdclvc1110pwr-etched.glb",
      "model_3d_plain": "cdclvc1110pwr.glb",
      "model_3d_step": "cdclvc1110pwr-etched.step",
      "model_3d_step_plain": "cdclvc1110pwr.step",
      "lbr": "cdclvc1110pwr.lbr"
    },
    "distributor_links": {
      "lcsc": "C2876957"
    },
    "pins": [
      {
        "number": "1",
        "name": "CLKIN",
        "type": "input",
        "description": "LVCMOS clock input pin accepting DC to 250 MHz for VDD=3.3V or DC to 180 MHz for VDD=2.5V."
      },
      {
        "number": "2",
        "name": "1G",
        "type": "input",
        "description": "Asynchronous output enable control; when driven low, all outputs transition to low state within 6 ns."
      },
      {
        "number": "3",
        "name": "Y0",
        "type": "output",
        "description": "LVCMOS clock output; unused outputs can be left floating to reduce component cost."
      },
      {
        "number": "4",
        "name": "GND",
        "type": "power_in",
        "description": "Device ground (return path for power supply)."
      },
      {
        "number": "5",
        "name": "VDD",
        "type": "power_out",
        "description": "Device power supply, 2.5V or 3.3V as configured."
      },
      {
        "number": "6",
        "name": "Y4",
        "type": "output",
        "description": "LVCMOS clock output with propagation delay of 2.0 ns (typ) at VDD=3.3V."
      },
      {
        "number": "7",
        "name": "GND",
        "type": "power_in",
        "description": "Device ground (return path for power supply)."
      },
      {
        "number": "8",
        "name": "Y6",
        "type": "output",
        "description": "LVCMOS clock output with output skew less than 50 ps between channels."
      },
      {
        "number": "9",
        "name": "VDD",
        "type": "power_out",
        "description": "Device power supply, 2.5V or 3.3V as configured."
      },
      {
        "number": "10",
        "name": "Y9",
        "type": "output",
        "description": "LVCMOS clock output with rise/fall time of 0.8 ns at VDD=3.3V."
      },
      {
        "number": "11",
        "name": "GND",
        "type": "power_in",
        "description": "Device ground (return path for power supply)."
      },
      {
        "number": "12",
        "name": "Y8",
        "type": "output",
        "description": "LVCMOS clock output with maximum additive jitter of 100 fs for 3.3V operation."
      },
      {
        "number": "13",
        "name": "Y7",
        "type": "output",
        "description": "LVCMOS clock output with part-to-part skew of 0.5 ns at VDD=3.3V."
      },
      {
        "number": "14",
        "name": "VDD",
        "type": "power_out",
        "description": "Device power supply, 2.5V or 3.3V as configured."
      },
      {
        "number": "15",
        "name": "Y5",
        "type": "output",
        "description": "LVCMOS clock output; output disable time to high-impedance is 6 ns maximum at VDD=3.3V."
      },
      {
        "number": "16",
        "name": "GND",
        "type": "power_in",
        "description": "Device ground (return path for power supply)."
      },
      {
        "number": "17",
        "name": "Y2",
        "type": "output",
        "description": "LVCMOS clock output with output enable time of 6 ns maximum at VDD=3.3V."
      },
      {
        "number": "18",
        "name": "VDD",
        "type": "power_out",
        "description": "Device power supply, 2.5V or 3.3V as configured."
      },
      {
        "number": "19",
        "name": "Y3",
        "type": "output",
        "description": "LVCMOS clock output with typical output impedance of 45 Ω at VDD=3.3V."
      },
      {
        "number": "20",
        "name": "Y1",
        "type": "output",
        "description": "LVCMOS clock output with high-level output voltage (VOH) of 2.5V minimum at IOH=−8 mA."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.2",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.2",
        "primary_model": "claude-haiku-4-5-20251001",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-4-6",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: VDD and GND pin positions inferred from remaining package pins and standard TSSOP power distribution"
        ],
        "pages_sent": 37,
        "cost_usd": 0.8497,
        "at": "2026-09-18T04:43:03"
      },
      "datasheet": {
        "url": "https://www.ti.com/lit/ds/symlink/cdclvc1110.pdf",
        "pages": 37,
        "sha256": "7b5ccb44b8bc0016",
        "source_tier": "mfr"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 20,
        "described": 20,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "cdclvc1110pwr.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.4,
          6.5,
          1.2
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "97339947f3a7196470ec2f1d9f9b92bb2fc2ab66ad53be0cf105192585ef3c9a",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "cdclvc1110pwr-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.4,
          6.5,
          1.2
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "87d1893fef68b87642c81b986d47a6e22db947e2c5a2f5321531daa5788c0472",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}