component
CDCLVC1108PW
Public Made by Adomby adom
Texas Instruments Clock Buffers, Drivers, Distributors, TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 1d ago |
| viewers | 1d ago |
| cdclvc1108pw-etched.glb | 1d ago |
| cdclvc1108pw-etched.step | 1d ago |
| cdclvc1108pw-hero.glb | 1d ago |
| cdclvc1108pw-hero.overlay.json | 1d ago |
| cdclvc1108pw.glb | 1d ago |
| cdclvc1108pw.kicad_mod | 1d ago |
| cdclvc1108pw.kicad_sym | 1d ago |
| cdclvc1108pw.lbr | 1d ago |
| cdclvc1108pw.step | 1d ago |
| package.json | 1d ago |
| page.json | 1d ago |
| README.md | 1d ago |
CDCLVC1108PW
Texas Instruments · Clock Buffers, Drivers, Distributors · TSSOP-16
CDCLVC1108PW from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CLKIN | input | LVCMOS clock input with threshold of VDD/2 and a maximum input frequency of 250 MHz at 3.3 V or 180 MHz at 2.5 V. |
| 2 | 1G | input | Asynchronous output enable that switches the outputs into a low state when 1G is low. |
| 3 | Y0 | output | LVCMOS clock output; unused outputs can be left floating. |
| 4 | GND | power_in | Device ground. |
| 5 | VDD | power_in | Device supply of 3.3 V (3.0 V to 3.6 V) or 2.5 V (2.3 V to 2.7 V). |
| 6 | Y4 | output | LVCMOS clock output; unused outputs can be left floating. |
| 7 | GND | power_in | Device ground. |
| 8 | Y6 | output | LVCMOS clock output; unused outputs can be left floating. |
| 9 | Y7 | output | LVCMOS clock output; unused outputs can be left floating. |
| 10 | VDD | power_in | Device supply of 3.3 V (3.0 V to 3.6 V) or 2.5 V (2.3 V to 2.7 V). |
| 11 | Y5 | output | LVCMOS clock output; unused outputs can be left floating. |
| 12 | GND | power_in | Device ground. |
| 13 | Y2 | output | LVCMOS clock output; unused outputs can be left floating. |
| 14 | VDD | power_in | Device supply of 3.3 V (3.0 V to 3.6 V) or 2.5 V (2.3 V to 2.7 V). |
| 15 | Y3 | output | LVCMOS clock output; unused outputs can be left floating. |
| 16 | Y1 | output | LVCMOS clock output; unused outputs can be left floating. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-16 |
| Category | Clock/Timing |
| Pins | 16 |
CAD (KiCad official)
- Symbol:
CDCLVC1108PW - Footprint:
Package_SO:TSSOP-16_4.4x5mm_P0.65mm - 3D model: TSSOP-16 (KiCad packages3D, STEP)
- 3D model files:
cdclvc1108pw-etched.step/cdclvc1108pw-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cdclvc1108pw.step/cdclvc1108pw.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (37 pp, sha256
7b5ccb44b8bc0016, retrieved 2026-10-08, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).