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Initial commit: component/cdclvc1104pwr

Ray ·37d1fc1efb ·2d ago
2 files changed +244
README.mdadded+44
@@ -0,0 +1,44 @@+# CDCLVC1104PWR++**Texas Instruments** · Clock Buffers, Drivers, Distributors · TSSOP-8++CDCLVC1104PWR from Texas Instruments, in a TSSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | CLKIN | input | LVCMOS clock input with threshold at VDD/2, VIL/VIH at VDD/2 ∓ 600 mV for 3.3 V (VDD/2 ∓ 400 mV for 2.5 V), input slew rate 1 to 4 V/ns, and maximum frequency 250 MHz at 3.3 V or 180 MHz at 2.5 V. |+| 2 | 1G | input | Asynchronous output enable control; when 1G is low, the outputs are switched into a low state. |+| 3 | Y0 | output | LVCMOS clock output; unused outputs can be left floating. |+| 4 | GND | power_in | Device ground. |+| 5 | Y2 | output | LVCMOS clock output; unused outputs can be left floating. |+| 6 | VDD | power_in | 2.5-V or 3.3-V device supply; 3.0 V to 3.6 V for 3.3 V operation and 2.3 V to 2.7 V for 2.5 V operation. |+| 7 | Y3 | output | LVCMOS clock output; unused outputs can be left floating. |+| 8 | Y1 | output | LVCMOS clock output; unused outputs can be left floating. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | TSSOP-8 |+| Category | Clock/Timing |+| Pins | 8 |++## CAD (KiCad official)++- Symbol: `CDCLVC1104PWR`+- Footprint: `Package_SO:TSSOP-8_3x3mm_P0.65mm`+- 3D model: TSSOP-8 (KiCad packages3D, STEP)+- 3D model files: `cdclvc1104pwr-etched.step` / `cdclvc1104pwr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `cdclvc1104pwr.step` / `cdclvc1104pwr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/cdclvc1104.pdf) (37 pp, sha256 `7b5ccb44b8bc0016`, retrieved 2026-10-08, tier: manufacturer)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/cdclvc1104pwr-datasheet.pdf)
page.jsonadded+200
@@ -0,0 +1,200 @@+{+  "slug": "cdclvc1104pwr",+  "version": "0.1.0",+  "type": "component",+  "description": "Texas Instruments Clock Buffers, Drivers, Distributors, TSSOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "clock-timing",+    "cdclvc1104pwr",+    "factory-2.0.0",+    "extractor-text"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "cdclvc1104pwr.kicad_sym",+    "cdclvc1104pwr.kicad_mod",+    "cdclvc1104pwr.glb",+    "cdclvc1104pwr.step",+    "cdclvc1104pwr.lbr",+    "docs/hero.png",+    "docs/cdclvc1104pwr-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html",+    "cdclvc1104pwr-hero.glb",+    "cdclvc1104pwr-hero.overlay.json"+  ],+  "component": {+    "mpn": "CDCLVC1104PWR",+    "manufacturer": "Texas Instruments",+    "package": "TSSOP-8",+    "pin_count": 8,+    "category": "Clock/Timing",+    "subcategory": "Clock Buffers, Drivers, Distributors",+    "datasheet": "https://www.ti.com/lit/ds/symlink/cdclvc1104.pdf",+    "parts": {+      "symbol": "cdclvc1104pwr.kicad_sym",+      "footprint": "cdclvc1104pwr.kicad_mod",+      "model_3d": "cdclvc1104pwr-hero.glb",+      "model_3d_plain": "cdclvc1104pwr.glb",+      "model_3d_step": "cdclvc1104pwr-etched.step",+      "model_3d_step_plain": "cdclvc1104pwr.step",+      "lbr": "cdclvc1104pwr.lbr"+    },+    "distributor_links": {+      "lcsc": "C485518",+      "digikey": "296-27549-2-ND",+      "mouser": "595-CDCLVC1104PWR"+    },+    "distributor_check": {+      "checked_at": "2026-10-08T02:25:21Z",+      "source": "Component Ocean /api/assign-pns",+      "digikey": {+        "pn": "296-27549-2-ND",+        "status": "found",+        "lifecycle": "Active"+      },+      "mouser": {+        "pn": "595-CDCLVC1104PWR",+        "status": "found"+      }+    },+    "pins": [+      {+        "number": "1",+        "name": "CLKIN",+        "type": "input",+        "description": "LVCMOS clock input with threshold at VDD/2, VIL/VIH at VDD/2 ∓ 600 mV for 3.3 V (VDD/2 ∓ 400 mV for 2.5 V), input slew rate 1 to 4 V/ns, and maximum frequency 250 MHz at 3.3 V or 180 MHz at 2.5 V."+      },+      {+        "number": "2",+        "name": "1G",+        "type": "input",+        "description": "Asynchronous output enable control; when 1G is low, the outputs are switched into a low state."+      },+      {+        "number": "3",+        "name": "Y0",+        "type": "output",+        "description": "LVCMOS clock output; unused outputs can be left floating."+      },+      {+        "number": "4",+        "name": "GND",+        "type": "power_in",+        "description": "Device ground."+      },+      {+        "number": "5",+        "name": "Y2",+        "type": "output",+        "description": "LVCMOS clock output; unused outputs can be left floating."+      },+      {+        "number": "6",+        "name": "VDD",+        "type": "power_in",+        "description": "2.5-V or 3.3-V device supply; 3.0 V to 3.6 V for 3.3 V operation and 2.3 V to 2.7 V for 2.5 V operation."+      },+      {+        "number": "7",+        "name": "Y3",+        "type": "output",+        "description": "LVCMOS clock output; unused outputs can be left floating."+      },+      {+        "number": "8",+        "name": "Y1",+        "type": "output",+        "description": "LVCMOS clock output; unused outputs can be left floating."+      }+    ],+    "provenance": {+      "extractor": "extract_pins 0.3",+      "factory_chain": {+        "factory": "2.0.0",+        "extractor": "extract_pins 0.3",+        "primary_model": "claude-haiku-5-5",+        "primary_mode": "text",+        "consensus_model": "claude-sonnet-5-5",+        "consensus": "agreed",+        "guards": "pin_guards 0.1: passed",+        "guard_notes": [+          "extractor flagged: The Pin Configuration figure text for the 8-pin variants is garbled in the extracted text, so the pi; The GND row for the 8-pin variants lists only pin 4, and the CDCLVC1104 column places Y3 on pin 7. T; Pin descriptions for Y0 to Y3 and CLKIN are the family-level text from the Pin Functions table and t"+        ],+        "pages_sent": 9,+        "cost_usd": 0.07,+        "at": "2026-10-08T02:25:05"+      },+      "datasheet": {+        "url": "https://www.ti.com/lit/ds/symlink/cdclvc1104.pdf",+        "pages": 37,+        "sha256": "7b5ccb44b8bc0016",+        "source_tier": "mfr"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 8,+        "described": 8,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    },+    "models_3d": [+      {+        "file": "cdclvc1104pwr.step",+        "role": "plain",+        "up": "Z",+        "units": "mm",+        "origin": "footprint origin = pad-pattern centre",+        "seat": "z = 0",+        "extents_mm": [+          4.9,+          3,+          1.1+        ],+        "zmin_mm": 0,+        "centre_offset_mm": 0,+        "footprint_binding": "identity",+        "sha256": "cf28a51742b2e31065e201d1b313207140cbfb49062efd938788f7a310d02738",+        "checked": "2026-10-08",+        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+      },+      {+        "file": "cdclvc1104pwr-etched.step",+        "role": "eda",+        "up": "Z",+        "units": "mm",+        "origin": "footprint origin = pad-pattern centre",+        "seat": "z = 0",+        "extents_mm": [+          4.9,+          3,+          1.1+        ],+        "zmin_mm": 0,+        "centre_offset_mm": 0,+        "footprint_binding": "identity",+        "sha256": "aa67864c44aae6a95786b752019b0966e1513cbd67e40c8c5677a3f23fb6b6c5",+        "checked": "2026-10-08",+        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+      }+    ]+  },+  "visibility": "public",+  "org": "adom",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file