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Contents

README

markdown

CDCLVC1103PWR

Texas Instruments · Clock Buffers, Drivers, Distributors · TSSOP-8

CDCLVC1103PWR from Texas Instruments, in a TSSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CLKIN input LVCMOS clock input, DC to 250 MHz at 3.3 V supply or DC to 180 MHz at 2.5 V supply.
2 1G input Asynchronous output enable control that switches all outputs to low state when driven low.
3 Y0 output LVCMOS clock output; unused outputs can be left floating.
4 GND power_in Device ground.
5 Y2 output LVCMOS clock output; unused outputs can be left floating.
6 VDD power_in Device supply voltage, 2.5 V or 3.3 V nominal.
7 GND power_in Device ground.
8 Y1 output LVCMOS clock output; unused outputs can be left floating.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-8
Category Clock/Timing
Pins 8

CAD (KiCad official)

  • Symbol: CDCLVC1103PWR
  • Footprint: Package_SO:TSSOP-8_3x3mm_P0.65mm
  • 3D model: TSSOP-8 (KiCad packages3D, STEP)
  • 3D model files: cdclvc1103pwr-etched.step / cdclvc1103pwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cdclvc1103pwr.step / cdclvc1103pwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (37 pp, sha256 7b5ccb44b8bc0016, retrieved 2026-10-03, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF