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CDCEL937PWR
Public Made by Adomby adom
Texas Instruments Clock Generators, PLLs, Frequency Synthesizers, TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownCDCEL937PWR
Texas Instruments · Clock Generators, PLLs, Frequency Synthesizers · TSSOP-20
CDCEL937PWR from Texas Instruments, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Xin/CLK | input | Crystal oscillator input or LVCMOS clock input, selectable through the SDA/SCL bus. |
| 2 | S0 | input | User-programmable LVCMOS control input S0 with internal 500k pullup; in default mode it switches all outputs ON or OFF. |
| 3 | VDD | power_in | 1.8V power supply for the device. |
| 4 | VCtrl | input | VCXO control voltage input; leave open or pull up (approximately 500k) when not used. |
| 5 | GND | power_in | Ground. |
| 6 | Vddout | power_in | Output supply for all outputs; 1.8V for CDCEL937 (this pin is one of three Vddout pins, 6, 10 and 13). |
| 7 | Y4 | output | LVCMOS output Y4. |
| 8 | Y5 | output | LVCMOS output Y5. |
| 9 | GND | power_in | Ground. |
| 10 | Vddout | power_in | Output supply for all outputs; 1.8V for CDCEL937 (one of three Vddout pins, 6, 10 and 13). |
| 11 | Y7 | output | LVCMOS output Y7. |
| 12 | Y6 | output | LVCMOS output Y6. |
| 13 | Vddout | power_in | Output supply for all outputs; 1.8V for CDCEL937 (one of three Vddout pins, 6, 10 and 13). |
| 14 | Y3 | output | LVCMOS output Y3. |
| 15 | Y2 | output | LVCMOS output Y2. |
| 16 | GND | power_in | Ground. |
| 17 | Y1 | output | LVCMOS output Y1; its state (power down, 3-state, low or active) is user-definable in the Generic Configuration Register. |
| 18 | SCL/S2 | bidirectional | Serial clock input SCL in default configuration (LVCMOS, internal 500k pullup); can be reprogrammed as user control input S2. |
| 19 | SDA/S1 | bidirectional | Bidirectional serial data SDA in default configuration (LVCMOS, internal 500k pullup); can be reprogrammed as user control input S1. |
| 20 | Xout | output | Crystal oscillator output; leave open or pull up (approximately 500k) when not used. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-20 |
| Category | Clock/Timing |
| Pins | 20 |
CAD (KiCad official)
- Symbol:
CDCEL937PWR - Footprint:
Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm - 3D model: TSSOP-20 (KiCad packages3D, STEP)
- 3D model files:
cdcel937pwr-etched.step/cdcel937pwr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cdcel937pwr.step/cdcel937pwr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (39 pp, sha256
c538114a66321dcf, retrieved 2026-10-08, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).