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CDCE6214TWRGETQ1
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Texas Instruments Clock Generators / Frequency Synthesizers / PLL, VQFN-24-EP(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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"type": "component",
"slug": "cdce6214twrgetq1",
"title": "CDCE6214TWRGETQ1",
"brief": "Texas Instruments Clock Generators / Frequency Synthesizers / PLL, VQFN-24-EP(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"version": "0.1.0",
"license": "CC-BY-SA-4.0",
"tags": [
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"clock and timing",
"cdce6214twrgetq1",
"factory-2.0.0",
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],
"component": {
"mpn": "CDCE6214TWRGETQ1",
"manufacturer": "Texas Instruments",
"package": "VQFN-24-EP(4x4)",
"pin_count": 25,
"category": "Clock and Timing",
"subcategory": "Clock Generators / Frequency Synthesizers / PLL",
"datasheet": "https://www.ti.com/lit/ds/symlink/cdce6214twrgetq1.pdf",
"parts": {
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"lbr": "cdce6214twrgetq1.lbr"
},
"distributor_links": {
"lcsc": "C1235975",
"digikey": "296-CDCE6214TWRGETQ1TR-ND",
"mouser": "595-CDCE6214TWRGETQ1"
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"source": "Component Ocean /api/assign-pns",
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"pins": [
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"number": "1",
"name": "SECREF_P",
"type": "input",
"description": "Secondary reference clock positive input; accepts a differential or single-ended input or XTAL, with AC-coupling capacitors required and internal differential biasing disabled in single-ended and XTAL modes."
},
{
"number": "2",
"name": "SECREF_N",
"type": "input",
"description": "Secondary reference clock negative input; accepts a differential or single-ended input or XTAL, with AC-coupling capacitors required and internal differential biasing disabled in single-ended and XTAL modes."
},
{
"number": "3",
"name": "VDD_REF",
"type": "power_in",
"description": "1.8 V/2.5 V/3.3 V power supply for the reference input and digital blocks; the datasheet gives a 1.71 V to 3.465 V recommended range."
},
{
"number": "4",
"name": "REFSEL",
"type": "input",
"description": "Manual 3-level reference input selection pin with weak pullup/pulldown (RPU = 50 kΩ, RPD = 50 kΩ)."
},
{
"number": "5",
"name": "PRIREF_P",
"type": "input",
"description": "Primary reference clock positive input; accepts a differential or single-ended input with AC-coupling capacitors required, and the non-driven input must be pulled down to ground for LVCMOS."
},
{
"number": "6",
"name": "PRIREF_N",
"type": "input",
"description": "Primary reference clock negative input; accepts a differential or single-ended input with AC-coupling capacitors required, and the non-driven input must be pulled down to ground for LVCMOS."
},
{
"number": "7",
"name": "OUT0",
"type": "output",
"description": "LVCMOS output 0 with configurable slew rate; the reference input can be bypassed into this output and it is excluded from the global output enable."
},
{
"number": "8",
"name": "PDN",
"type": "input",
"description": "Device power-down/reset input (active low) or SYNCN, with a weak 50 kΩ pullup resistor."
},
{
"number": "9",
"name": "OUT4_N",
"type": "output",
"description": "Output pair 4 negative; programmable as LVDS-like/LP-HCSL or as 2x LVCMOS outputs."
},
{
"number": "10",
"name": "OUT4_P",
"type": "output",
"description": "Output pair 4 positive; programmable as LVDS-like/LP-HCSL or as 2x LVCMOS outputs."
},
{
"number": "11",
"name": "GPIO4",
"type": "bidirectional",
"description": "STATUS output or GPIO4 input with a weak 50 kΩ pullup enabled when configured as input and disabled in output mode."
},
{
"number": "12",
"name": "SCL/GPIO3",
"type": "input",
"description": "I2C serial clock or GPIO3 input; requires an external pullup resistor to VDD_REF in I2C mode and is a fail-safe input."
},
{
"number": "13",
"name": "OUT3_N",
"type": "output",
"description": "Output pair 3 negative; programmable LVDS-like or LP-HCSL output."
},
{
"number": "14",
"name": "OUT3_P",
"type": "output",
"description": "Output pair 3 positive; programmable LVDS-like or LP-HCSL output."
},
{
"number": "15",
"name": "VDDO_34",
"type": "power_in",
"description": "1.8 V/2.5 V/3.3 V power supply for the OUT0, OUT3 and OUT4 channels; the datasheet gives a 1.71 V to 3.465 V recommended range."
},
{
"number": "16",
"name": "VDDO_12",
"type": "power_in",
"description": "1.8 V/2.5 V/3.3 V power supply for the OUT1 and OUT2 channels; the datasheet gives a 1.71 V to 3.465 V recommended range."
},
{
"number": "17",
"name": "OUT2_N",
"type": "output",
"description": "Output pair 2 negative; programmable LVDS-like or LP-HCSL output."
},
{
"number": "18",
"name": "OUT2_P",
"type": "output",
"description": "Output pair 2 positive; programmable LVDS-like or LP-HCSL output."
},
{
"number": "19",
"name": "SDA/GPIO2",
"type": "bidirectional",
"description": "I2C serial data (open-drain) or GPIO2 input; requires an external pullup resistor to VDD_REF in I2C mode and is a fail-safe input."
},
{
"number": "20",
"name": "GPIO1",
"type": "bidirectional",
"description": "STATUS output or GPIO1 input with a weak 50 kΩ pullup enabled when configured as input and disabled in output mode."
},
{
"number": "21",
"name": "OUT1_N",
"type": "output",
"description": "Output pair 1 negative; programmable as LVDS-like/LP-HCSL or as 2x LVCMOS outputs."
},
{
"number": "22",
"name": "OUT1_P",
"type": "output",
"description": "Output pair 1 positive; programmable as LVDS-like/LP-HCSL or as 2x LVCMOS outputs."
},
{
"number": "23",
"name": "HW_SW_CTRL",
"type": "input",
"description": "Manual 3-level EEPROM page select pin with weak pullup/pulldown (RPU = 50 kΩ, RPD = 50 kΩ), sampled after power-up."
},
{
"number": "24",
"name": "VDD_VCO",
"type": "power_in",
"description": "1.8 V/2.5 V/3.3 V power supply for the PLL/VCO; the datasheet gives a 1.71 V to 3.465 V recommended range."
},
{
"number": "25",
"name": "EP",
"type": "passive",
"description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
}
],
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"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
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],
"pages_sent": 11,
"cost_usd": 0.0283,
"at": "2026-11-02T17:47:07"
},
"datasheet": {
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"pages": 53,
"sha256": "91c3c761fb571a33",
"source_tier": "mfr"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
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"described": 25,
"cites_pages": true,
"refuses_to_fabricate": true
}
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"metadata": {
"specs": {
"Manufacturer": "Texas Instruments",
"Package": "VQFN-24-EP(4x4)",
"Category": "Clock and Timing",
"Pins": "25"
},
"characteristics": {
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"source": "datasheet",
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"name": "Supply Voltage (VDD_REF, VDD_VCO, VDDO_12, VDDO_34)",
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"kind": "absolute_maximum",
"unit": "V",
"min": -0.3,
"typ": null,
"max": 3.63,
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{
"name": "Junction Temperature",
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"kind": "absolute_maximum",
"unit": "°C",
"min": null,
"typ": null,
"max": 125,
"conditions": "",
"source_page": 5,
"source": "datasheet"
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{
"name": "Storage temperature",
"symbol": "Tstg",
"kind": "absolute_maximum",
"unit": "°C",
"min": -65,
"typ": null,
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{
"name": "Core supply voltage",
"symbol": "VDD_VCO",
"kind": "recommended_operating",
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"min": 1.71,
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"max": 3.465,
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{
"name": "Output supply voltage",
"symbol": "VDDO_12",
"kind": "recommended_operating",
"unit": "V",
"min": 1.71,
"typ": null,
"max": 3.465,
"conditions": "",
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"source": "datasheet"
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{
"name": "Reference supply voltage",
"symbol": "VDD_REF",
"kind": "recommended_operating",
"unit": "V",
"min": 1.71,
"typ": null,
"max": 3.465,
"conditions": "",
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{
"name": "Ambient temperature",
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{
"name": "Junction temperature",
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"unit": "°C",
"min": -40,
"typ": null,
"max": 125,
"conditions": "",
"source_page": 5,
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{
"name": "Continuous lock over temperature",
"symbol": "TLOCK",
"kind": "recommended_operating",
"unit": "°C",
"min": null,
"typ": null,
"max": 145,
"conditions": "without VCO calibration",
"source_page": 5,
"source": "datasheet"
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{
"name": "Maximum supply voltage ramp time",
"symbol": "tRAMP",
"kind": "timing",
"unit": "ms",
"min": 0.1,
"typ": null,
"max": 30,
"conditions": "",
"source_page": 5,
"source": "datasheet"
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{
"name": "Reference frequency",
"symbol": "fIN_Ref",
"kind": "electrical",
"unit": "MHz",
"min": 10,
"typ": null,
"max": 200,
"conditions": "",
"source_page": 6,
"source": "datasheet"
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{
"name": "Input duty cycle",
"symbol": "IDC",
"kind": "electrical",
"unit": "%",
"min": 40,
"typ": null,
"max": 60,
"conditions": "",
"source_page": 6,
"source": "datasheet"
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{
"name": "Input leakage current",
"symbol": "IIN_LEAKAGE",
"kind": "electrical",
"unit": "µA",
"min": -100,
"typ": null,
"max": 100,
"conditions": "",
"source_page": 6,
"source": "datasheet"
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{
"name": "Differential input voltage swing, peak-to-peak",
"symbol": "VIN_DIFF",
"kind": "electrical",
"unit": "V",
"min": 0.4,
"typ": null,
"max": 1.6,
"conditions": "VDD_REF = 2.5 V/3.3 V",
"source_page": 6,
"source": "datasheet"
},
{
"name": "Differential input voltage swing, peak-to-peak",
"symbol": "VIN_DIFF",
"kind": "electrical",
"unit": "V",
"min": 0.4,
"typ": null,
"max": 1,
"conditions": "VDD_REF = 1.8 V",
"source_page": 6,
"source": "datasheet"
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{
"name": "Crystal frequency",
"symbol": "fIN_Xtal",
"kind": "electrical",
"unit": "MHz",
"min": 10,
"typ": null,
"max": 50,
"conditions": "Fundamental mode",
"source_page": 6,
"source": "datasheet"
},
{
"name": "Crystal tolerated drive power",
"symbol": "PXTAL",
"kind": "electrical",
"unit": "µW",
"min": null,
"typ": null,
"max": 200,
"conditions": "A supported crystal",
"source_page": 6,
"source": "datasheet"
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{
"name": "On-Chip load capacitance",
"symbol": "CXIN_LOAD",
"kind": "electrical",
"unit": "pF",
"min": 3,
"typ": null,
"max": 9.1,
"conditions": "Programmable in typ. 200 fF steps",
"source_page": 6,
"source": "datasheet"
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{
"name": "Input high level current",
"symbol": "IIH",
"kind": "electrical",
"unit": "µA",
"min": -5,
"typ": null,
"max": 5,
"conditions": "VIH = VDD_REF, GPIO[1:4], PDN",
"source_page": 7,
"source": "datasheet"
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{
"name": "Input low level current",
"symbol": "IIL",
"kind": "electrical",
"unit": "µA",
"min": -5,
"typ": null,
"max": 5,
"conditions": "VIL = GND, GPIO[2:3]",
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"source": "datasheet"
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{
"name": "Input low level current",
"symbol": "IIL",
"kind": "electrical",
"unit": "µA",
"min": -100,
"typ": null,
"max": 100,
"conditions": "VIL = GND, GPIO[1], GPIO[4], PDN",
"source_page": 7,
"source": "datasheet"
},
{
"name": "Pullup Resistance",
"symbol": "RPU",
"kind": "electrical",
"unit": "kΩ",
"min": 30,
"typ": 55,
"max": 80,
"conditions": "Pins PDN, GPIO[1], GPIO[4]",
"source_page": 7,
"source": "datasheet"
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{
"name": "Input high level current (triple level)",
"symbol": "IIH",
"kind": "electrical",
"unit": "µA",
"min": 20,
"typ": 50,
"max": 100,
"conditions": "VIH = VDD_REF",
"source_page": 7,
"source": "datasheet"
},
{
"name": "Input low level current (triple level)",
"symbol": "IIL",
"kind": "electrical",
"unit": "µA",
"min": -100,
"typ": -50,
"max": -20,
"conditions": "VIL = GND",
"source_page": 7,
"source": "datasheet"
},
{
"name": "Phase Detector Frequency",
"symbol": "fPFD",
"kind": "electrical",
"unit": "MHz",
"min": 1,
"typ": null,
"max": 100,
"conditions": "Integer and Fractional PLL mode",
"source_page": 7,
"source": "datasheet"
},
{
"name": "Voltage Controlled Oscillator Frequency",
"symbol": "fVCO",
"kind": "electrical",
"unit": "MHz",
"min": 2335,
"typ": null,
"max": 2625,
"conditions": "",
"source_page": 7,
"source": "datasheet"
},
{
"name": "Configurable closed-loop PLL Bandwidth",
"symbol": "fBW",
"kind": "electrical",
"unit": "kHz",
"min": 100,
"typ": null,
"max": 1600,
"conditions": "REF = 25 MHz",
"source_page": 7,
"source": "datasheet"
},
{
"name": "RMS Phase Jitter (int-PLL)",
"symbol": "tRJ_CL",
"kind": "electrical",
"unit": "fs",
"min": null,
"typ": 350,
"max": 600,
"conditions": "RMS jitter with spurs from 12 kHz to 20 MHz, Input Crystal = 25 MHz, Differential OUTx > 100 MHz, int-PLL",
"source_page": 8,
"source": "datasheet"
},
{
"name": "RMS Phase Jitter (frac-PLL)",
"symbol": "tRJ_CL",
"kind": "electrical",
"unit": "fs",
"min": null,
"typ": 1600,
"max": 2100,
"conditions": "RMS jitter with spurs from 12 kHz to 20 MHz, Input Crystal = 25 MHz, Differential OUTx > 100 MHz, frac-PLL",
"source_page": 8,
"source": "datasheet"
},
{
"name": "RMS Phase Jitter (PCIe)",
"symbol": "tRJ_CL, PCIE",
"kind": "electrical",
"unit": "fs",
"min": null,
"typ": 475,
"max": 1000,
"conditions": "PCIe Gen 3 Filter applied, XIN = Crystal 25 MHz, OUTx = 100 MHz, frac-N PLL with and without SSC, LP-HCSL or LVDS output",
"source_page": 8,
"source": "datasheet"
},
{
"name": "Input-to-output delay variation in ZDB mode",
"symbol": "tPROP-VARIATION",
"kind": "timing",
"unit": "ps",
"min": -400,
"typ": null,
"max": 400,
"conditions": "ZDB mode, LVCMOS input = LVCMOS output = 25 MHz, PLL BW = 300 kHz to 900 kHz across temperature",
"source_page": 8,
"source": "datasheet"
},
{
"name": "SSC modulation rate",
"symbol": "fSSC-RATE",
"kind": "electrical",
"unit": "kHz",
"min": 30,
"typ": 31.5,
"max": 33,
"conditions": "OUTx = 100 MHz",
"source_page": 8,
"source": "datasheet"
},
{
"name": "Down spread minimum/maximum deviation",
"symbol": "tSSC_FREQ_DEVIATION",
"kind": "electrical",
"unit": "%",
"min": -0.5,
"typ": null,
"max": 0,
"conditions": "OUTx = 100 MHz. FPFD = 25 MHz, 50 MHz, 100 MHz",
"source_page": 9,
"source": "datasheet"
},
{
"name": "Center spread minimum/maximum deviation",
"symbol": "tSSC_FREQ_DEVIATION",
"kind": "electrical",
"unit": "%",
"min": -0.5,
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