CDCE62005RGZR

{
  "schema_version": 1,
  "type": "component",
  "slug": "cdce62005rgzr",
  "title": "CDCE62005RGZR",
  "brief": "Texas Instruments Clock Generators / Frequency Synthesizers / PLL, VQFN-48-EP(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.1.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
    "component",
    "rtc-clock chip",
    "cdce62005rgzr",
    "factory-2.0.0",
    "extractor-text"
  ],
  "component": {
    "mpn": "CDCE62005RGZR",
    "manufacturer": "Texas Instruments",
    "package": "VQFN-48-EP(7x7)",
    "pin_count": 49,
    "category": "RTC/Clock Chip",
    "subcategory": "Clock Generators / Frequency Synthesizers / PLL",
    "datasheet": "https://www.ti.com/cn/lit/gpn/cdce62005",
    "parts": {
      "symbol": "cdce62005rgzr.kicad_sym",
      "footprint": "cdce62005rgzr.kicad_mod",
      "model_3d": "cdce62005rgzr-hero.glb",
      "model_3d_plain": "cdce62005rgzr-etched.glb",
      "model_3d_step": "cdce62005rgzr-etched.step",
      "model_3d_step_plain": "cdce62005rgzr.step",
      "lbr": "cdce62005rgzr.lbr"
    },
    "distributor_links": {
      "lcsc": "C2870969",
      "digikey": "296-38907-2-ND",
      "mouser": "595-CDCE62005RGZR"
    },
    "distributor_check": {
      "checked_at": "2026-11-02T17:01:28Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "296-38907-2-ND",
        "status": "found"
      },
      "mouser": {
        "pn": "595-CDCE62005RGZR",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "VCC_IN_SEC",
        "type": "power_in",
        "description": "3.3-V supply for the secondary reference input buffer and circuitry."
      },
      {
        "number": "2",
        "name": "SEC_REF–",
        "type": "input",
        "description": "Universal input buffer (LVPECL, LVDS) negative input for the secondary reference clock; for LVCMOS input on SEC_REF+, connect through 1-kΩ resistor to GND."
      },
      {
        "number": "3",
        "name": "SEC_REF+",
        "type": "input",
        "description": "Universal input buffer (LVPECL, LVDS, LVCMOS) positive input for the secondary reference clock."
      },
      {
        "number": "4",
        "name": "REG_CAP1",
        "type": "passive",
        "description": "Capacitor connection for the internal regulator; connect to a 10-µF capacitor (X5R or X7R)."
      },
      {
        "number": "5",
        "name": "VCC1_PLL",
        "type": "power_in",
        "description": "3.3-V PLL supply voltage for the PLL circuitry (filter required)."
      },
      {
        "number": "6",
        "name": "U4P",
        "type": "output",
        "description": "Main output 4 positive; user-definable as LVPECL, LVDS or LVCMOS."
      },
      {
        "number": "7",
        "name": "U4N",
        "type": "output",
        "description": "Main output 4 negative; user-definable as LVPECL, LVDS or LVCMOS."
      },
      {
        "number": "8",
        "name": "VCC_OUT",
        "type": "power_in",
        "description": "3.3-V supply for the output buffers and output dividers."
      },
      {
        "number": "9",
        "name": "U3P",
        "type": "output",
        "description": "Main output 3 positive; user-definable as LVPECL, LVDS or LVCMOS."
      },
      {
        "number": "10",
        "name": "U3N",
        "type": "output",
        "description": "Main output 3 negative; user-definable as LVPECL, LVDS or LVCMOS."
      },
      {
        "number": "11",
        "name": "VCC_OUT",
        "type": "power_in",
        "description": "3.3-V supply for the output buffers and output dividers."
      },
      {
        "number": "12",
        "name": "Power_Down",
        "type": "input",
        "description": "Active-low power-down input with internal 150-kΩ pull-up; SPI_LE must be high for the rising edge to load the EEPROM."
      },
      {
        "number": "13",
        "name": "AUX OUT",
        "type": "output",
        "description": "Auxiliary LVCMOS-level output programmable via SPI to be driven by Output 2 or Output 3."
      },
      {
        "number": "14",
        "name": "SYNC",
        "type": "input",
        "description": "Active-low sync mode input with internal 150-kΩ pull-up."
      },
      {
        "number": "15",
        "name": "VCC_AUXOUT",
        "type": "power_in",
        "description": "3.3-V supply to power the AUX_OUT circuitry."
      },
      {
        "number": "16",
        "name": "U2P",
        "type": "output",
        "description": "Main output 2 positive; user-definable as LVPECL, LVDS or LVCMOS."
      },
      {
        "number": "17",
        "name": "U2N",
        "type": "output",
        "description": "Main output 2 negative; user-definable as LVPECL, LVDS or LVCMOS."
      },
      {
        "number": "18",
        "name": "VCC_OUT",
        "type": "power_in",
        "description": "3.3-V supply for the output buffers and output dividers."
      },
      {
        "number": "19",
        "name": "U1P",
        "type": "output",
        "description": "Main output 1 positive; user-definable as LVPECL, LVDS or LVCMOS."
      },
      {
        "number": "20",
        "name": "U1N",
        "type": "output",
        "description": "Main output 1 negative; user-definable as LVPECL, LVDS or LVCMOS."
      },
      {
        "number": "21",
        "name": "VCC_OUT",
        "type": "power_in",
        "description": "3.3-V supply for the output buffers and output dividers."
      },
      {
        "number": "22",
        "name": "SPI_MISO",
        "type": "tri_state",
        "description": "3-state LVCMOS serial data output to the SPI bus, enabled when SPI_LE is asserted low."
      },
      {
        "number": "23",
        "name": "SPI_MOSI",
        "type": "input",
        "description": "LVCMOS serial control data input for the SPI bus with internal 150-kΩ pull-up."
      },
      {
        "number": "24",
        "name": "SPI_CLK",
        "type": "input",
        "description": "LVCMOS serial control clock input for the SPI bus with hysteresis and internal 150-kΩ pull-up."
      },
      {
        "number": "25",
        "name": "SPI_LE",
        "type": "input",
        "description": "LVCMOS latch enable input for the SPI with hysteresis and internal 150-kΩ pull-up; it must be logic 1 before Power_Down toggles low-to-high for EEPROM load."
      },
      {
        "number": "26",
        "name": "VCC_OUT",
        "type": "power_in",
        "description": "3.3-V supply for the output buffers and output dividers."
      },
      {
        "number": "27",
        "name": "U0P",
        "type": "output",
        "description": "Main output 0 positive; user-definable as LVPECL, LVDS or LVCMOS."
      },
      {
        "number": "28",
        "name": "U0N",
        "type": "output",
        "description": "Main output 0 negative; user-definable as LVPECL, LVDS or LVCMOS."
      },
      {
        "number": "29",
        "name": "VCC_OUT",
        "type": "power_in",
        "description": "3.3-V supply for the output buffers and output dividers."
      },
      {
        "number": "30",
        "name": "TESTOUTA",
        "type": "passive",
        "description": "Reserved analog pin; pull down to GND via a 1-kΩ resistor."
      },
      {
        "number": "31",
        "name": "REF_SEL",
        "type": "input",
        "description": "External input reference select with internal 150-kΩ pull-up, active only when auto reference select mode is off."
      },
      {
        "number": "32",
        "name": "VCC_OUT",
        "type": "power_in",
        "description": "3.3-V supply for the output buffers and output dividers."
      },
      {
        "number": "33",
        "name": "TEST_MODE",
        "type": "input",
        "description": "Should be tied high or left unconnected."
      },
      {
        "number": "34",
        "name": "VCC_VCO",
        "type": "power_in",
        "description": "3.3-V VCO input buffer and circuitry supply voltage (filter required)."
      },
      {
        "number": "35",
        "name": "VCC_VCO",
        "type": "power_in",
        "description": "3.3-V VCO input buffer and circuitry supply voltage (filter required)."
      },
      {
        "number": "36",
        "name": "GND_VCO",
        "type": "power_in",
        "description": "Ground connection to VCO ground, shorted to GND."
      },
      {
        "number": "37",
        "name": "PLL_LOCK",
        "type": "output",
        "description": "Output indicating PLL lock status."
      },
      {
        "number": "38",
        "name": "REG_CAP2",
        "type": "passive",
        "description": "Capacitor connection for the internal regulator; connect to a 10-µF capacitor (X5R or X7R)."
      },
      {
        "number": "39",
        "name": "VCC2_PLL",
        "type": "power_in",
        "description": "3.3-V PLL supply voltage for the PLL circuitry (filter required)."
      },
      {
        "number": "40",
        "name": "EXT_LFP",
        "type": "passive",
        "description": "External loop filter input, positive."
      },
      {
        "number": "41",
        "name": "EXT_LFN",
        "type": "passive",
        "description": "External loop filter input, negative."
      },
      {
        "number": "42",
        "name": "VCC2_PLL",
        "type": "power_in",
        "description": "3.3-V PLL supply voltage for the PLL circuitry (filter required)."
      },
      {
        "number": "43",
        "name": "AUX IN",
        "type": "input",
        "description": "Single-ended auxiliary input with on-board oscillator circuit so a crystal may be connected."
      },
      {
        "number": "44",
        "name": "VCC_AUXIN",
        "type": "power_in",
        "description": "3.3-V supply for the crystal oscillator input circuitry."
      },
      {
        "number": "45",
        "name": "PRI_REF+",
        "type": "input",
        "description": "Universal input buffer (LVPECL, LVDS, LVCMOS) positive input for the primary reference clock."
      },
      {
        "number": "46",
        "name": "PRI_REF–",
        "type": "input",
        "description": "Universal input buffer (LVPECL, LVDS) negative input for the primary reference clock; for LVCMOS input on PRI_REF+, connect through 1-kΩ resistor to GND."
      },
      {
        "number": "47",
        "name": "VCC_IN_PRI",
        "type": "power_in",
        "description": "3.3-V supply for the primary reference input buffer and circuitry."
      },
      {
        "number": "48",
        "name": "VBB",
        "type": "passive",
        "description": "Capacitor connection for the internal termination voltage; connect to a 1-µF capacitor (X5R or X7R)."
      },
      {
        "number": "49",
        "name": "EP",
        "type": "passive",
        "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The GND thermal pad is listed in the pin table without a printed number, so it is omitted from the p"
        ],
        "pages_sent": 12,
        "cost_usd": 0.039,
        "at": "2026-11-02T17:01:04"
      },
      "datasheet": {
        "url": "https://www.ti.com/cn/lit/gpn/cdce62005",
        "pages": 86,
        "sha256": "d29c55d80466bf88",
        "source_tier": "mfr"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 49,
        "described": 49,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
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        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
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        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "f2b38b0b4bf967c77e683e8d4599608b9f0503055ec535b93c4ebb5d0163e916",
        "checked": "2026-11-02",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "cdce62005rgzr-etched.step",
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        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "1ea7c9e74e0dc30a270d50bcaff55a94bce191691f99a2a41a190b216531f8a3",
        "checked": "2026-11-02",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  },
  "metadata": {
    "specs": {
      "Manufacturer": "Texas Instruments",
      "Package": "VQFN-48-EP(7x7)",
      "Category": "RTC/Clock Chip",
      "Pins": "49"
    }
  },
  "variants": [],
  "sections": [
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    "viewers",
    "readme",
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    "info"
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  "discovery_triggers": [
    "cdce62005rgzr"
  ],
  "discovery_pitch": "CDCE62005RGZR (Texas Instruments) component page: datasheet pinout, KiCad symbol, footprint and 3D.",
  "author": {
    "name": "Ray"
  },
  "dependencies": {},
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}