component
CDC391D
Public Made by Adomby adom
Texas Instruments Clock Buffers, Drivers, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+52@@ -0,0 +1,52 @@+# CDC391D++**Texas Instruments** · Clock Buffers, Drivers · SOIC-16++CDC391D from Texas Instruments, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | GND | power_in | Ground pin; the device has distributed GND pins (1, 4, 7) to reduce switching noise. |+| 2 | 1Y2 | tri_state | Bank 1 clock output, true or complementary per 1T/C, with high-drive capability of −48 mA IOH and 48 mA IOL, and high-impedance when OE is high. |+| 3 | 1Y3 | tri_state | Bank 1 clock output, true or complementary per 1T/C, with high-drive capability of −48 mA IOH and 48 mA IOL, and high-impedance when OE is high. |+| 4 | GND | power_in | Ground pin; the device has distributed GND pins (1, 4, 7) to reduce switching noise. |+| 5 | 2Y1 | tri_state | Bank 2 clock output, true or complementary per 2T/C, with high-drive capability of −48 mA IOH and 48 mA IOL, and high-impedance when OE is high. |+| 6 | 2Y2 | tri_state | Bank 2 clock output, true or complementary per 2T/C, with high-drive capability of −48 mA IOH and 48 mA IOL, and high-impedance when OE is high. |+| 7 | GND | power_in | Ground pin; the device has distributed GND pins (1, 4, 7) to reduce switching noise. |+| 8 | 3Y1 | tri_state | Bank 3 clock output, true or complementary per 3T/C, with high-drive capability of −48 mA IOH and 48 mA IOL, and high-impedance when OE is high. |+| 9 | OE | input | Output-enable input; when high, all Y outputs are placed in the high-impedance state per the function table. |+| 10 | 3T/C | input | Polarity-control input for bank 3; low gives true outputs (Y follows A) and high gives complementary outputs (Y inverts A). |+| 11 | VCC | power_in | Supply voltage pin; recommended VCC is 4.75 V to 5.25 V (5 V nominal), with distributed VCC pins to reduce switching noise. |+| 12 | A | input | Clock input that distributes to all six Y outputs; input clock frequency up to 100 MHz with input transition rate of 5 ns/V maximum. |+| 13 | 2T/C | input | Polarity-control input for bank 2; low gives true outputs (Y follows A) and high gives complementary outputs (Y inverts A). |+| 14 | VCC | power_in | Supply voltage pin; recommended VCC is 4.75 V to 5.25 V (5 V nominal), with distributed VCC pins to reduce switching noise. |+| 15 | 1T/C | input | Polarity-control input for bank 1; low gives true outputs (Y follows A) and high gives complementary outputs (Y inverts A). |+| 16 | 1Y1 | tri_state | Bank 1 clock output, true or complementary per 1T/C, with high-drive capability of −48 mA IOH and 48 mA IOL, and high-impedance when OE is high. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | SOIC-16 |+| Category | RTC/Clock Chip |+| Pins | 16 |++## CAD (KiCad official)++- Symbol: `CDC391D`+- Footprint: `Package_SO:SOIC-16_3.9x9.9mm_P1.27mm`+- 3D model: SOIC-16 (KiCad packages3D, STEP)+- 3D model files: `cdc391d-etched.step` / `cdc391d-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `cdc391d.step` / `cdc391d.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/cdc391) (9 pp, sha256 `4ed073ab6061c2c0`, retrieved 2026-10-08, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/cdc391d-datasheet.pdf)
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Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "rtc-clock chip",+ "cdc391d",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "cdc391d.kicad_sym",+ "cdc391d.kicad_mod",+ "cdc391d.glb",+ "cdc391d.step",+ "cdc391d.lbr",+ "docs/hero.png",+ "docs/cdc391d-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "cdc391d-hero.glb",+ "cdc391d-hero.overlay.json"+ ],+ "component": {+ "mpn": "CDC391D",+ "manufacturer": "Texas Instruments",+ "package": "SOIC-16",+ "pin_count": 16,+ "category": "RTC/Clock Chip",+ "subcategory": "Clock Buffers, Drivers",+ "datasheet": "https://www.ti.com/cn/lit/gpn/cdc391",+ "parts": {+ "symbol": "cdc391d.kicad_sym",+ "footprint": "cdc391d.kicad_mod",+ "model_3d": "cdc391d-hero.glb",+ "model_3d_plain": "cdc391d.glb",+ "model_3d_step": "cdc391d-etched.step",+ "model_3d_step_plain": "cdc391d.step",+ "lbr": "cdc391d.lbr"+ },+ "distributor_links": {+ "lcsc": "C1545859",+ "digikey": "2156-CDC391D-ND",+ "mouser": "595-CDC391D"+ },+ "distributor_check": {+ "checked_at": "2026-10-08T14:39:24Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "2156-CDC391D-ND",+ "status": "found",+ "lifecycle": "Active"+ },+ "mouser": {+ "pn": "595-CDC391D",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "GND",+ "type": "power_in",+ "description": "Ground pin; the device has distributed GND pins (1, 4, 7) to reduce switching noise."+ },+ {+ "number": "2",+ "name": "1Y2",+ "type": "tri_state",+ "description": "Bank 1 clock output, true or complementary per 1T/C, with high-drive capability of −48 mA IOH and 48 mA IOL, and high-impedance when OE is high."+ },+ {+ "number": "3",+ "name": "1Y3",+ "type": "tri_state",+ "description": "Bank 1 clock output, true or complementary per 1T/C, with high-drive capability of −48 mA IOH and 48 mA IOL, and high-impedance when OE is high."+ },+ {+ "number": "4",+ "name": "GND",+ "type": "power_in",+ "description": "Ground pin; the device has distributed GND pins (1, 4, 7) to reduce switching noise."+ },+ {+ "number": "5",+ "name": "2Y1",+ "type": "tri_state",+ "description": "Bank 2 clock output, true or complementary per 2T/C, with high-drive capability of −48 mA IOH and 48 mA IOL, and high-impedance when OE is high."+ },+ {+ "number": "6",+ "name": "2Y2",+ "type": "tri_state",+ "description": "Bank 2 clock output, true or complementary per 2T/C, with high-drive capability of −48 mA IOH and 48 mA IOL, and high-impedance when OE is high."+ },+ {+ "number": "7",+ "name": "GND",+ "type": "power_in",+ "description": "Ground pin; the device has distributed GND pins (1, 4, 7) to reduce switching noise."+ },+ {+ "number": "8",+ "name": "3Y1",+ "type": "tri_state",+ "description": "Bank 3 clock output, true or complementary per 3T/C, with high-drive capability of −48 mA IOH and 48 mA IOL, and high-impedance when OE is high."+ },+ {+ "number": "9",+ "name": "OE",+ "type": "input",+ "description": "Output-enable input; when high, all Y outputs are placed in the high-impedance state per the function table."+ },+ {+ "number": "10",+ "name": "3T/C",+ "type": "input",+ "description": "Polarity-control input for bank 3; low gives true outputs (Y follows A) and high gives complementary outputs (Y inverts A)."+ },+ {+ "number": "11",+ "name": "VCC",+ "type": "power_in",+ "description": "Supply voltage pin; recommended VCC is 4.75 V to 5.25 V (5 V nominal), with distributed VCC pins to reduce switching noise."+ },+ {+ "number": "12",+ "name": "A",+ "type": "input",+ "description": "Clock input that distributes to all six Y outputs; input clock frequency up to 100 MHz with input transition rate of 5 ns/V maximum."+ },+ {+ "number": "13",+ "name": "2T/C",+ "type": "input",+ "description": "Polarity-control input for bank 2; low gives true outputs (Y follows A) and high gives complementary outputs (Y inverts A)."+ },+ {+ "number": "14",+ "name": "VCC",+ "type": "power_in",+ "description": "Supply voltage pin; recommended VCC is 4.75 V to 5.25 V (5 V nominal), with distributed VCC pins to reduce switching noise."+ },+ {+ "number": "15",+ "name": "1T/C",+ "type": "input",+ "description": "Polarity-control input for bank 1; low gives true outputs (Y follows A) and high gives complementary outputs (Y inverts A)."+ },+ {+ "number": "16",+ "name": "1Y1",+ "type": "tri_state",+ "description": "Bank 1 clock output, true or complementary per 1T/C, with high-drive capability of −48 mA IOH and 48 mA IOL, and high-impedance when OE is high."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: The logic diagram on page 2 lists the T/C and A pin numbers in a sequence that does not map cleanly ; The datasheet gives no electrical spec field for this schema beyond the recommended VCC range (4.75 "+ ],+ "pages_sent": 9,+ "cost_usd": 0.0631,+ "at": "2026-10-08T14:39:06"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/cdc391",+ "pages": 9,+ "sha256": "4ed073ab6061c2c0",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 16,+ "described": 16,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "cdc391d.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6,+ 9.9,+ 1.75+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "d5eeddb4c0b304dc61950919b126fc61d7586abd5f16ab71a2a79759ec6498bf",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "cdc391d-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6,+ 9.9,+ 1.75+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "a50c77478f39c12406d9c8561dafcfced1b63d533ad3a6b872dc277959390c8c",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}