component
CDC2351MDBREP
Public Made by Adomby adom
Texas Instruments Clock Buffers, Drivers, SSOP-24-208mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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CDC2351MDBREP
Texas Instruments · Clock Buffers, Drivers · SSOP-24-208mil
CDC2351MDBREP from Texas Instruments, in a SSOP-24-208mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground reference pin; the datasheet notes distributed VCC and ground pins are used to reduce switching noise. |
| 2 | Y10 | output | Clock output 10 with internal series damping resistor; tri-stated (high impedance) when OE is high, IOH −12 mA and IOL 12 mA max at VCC = 3 V. |
| 3 | VCC | power_in | Supply pin; recommended operating supply voltage is 3 V to 3.6 V (nominal 3.3 V). |
| 4 | Y9 | output | Clock output 9 with internal series damping resistor; tri-stated (high impedance) when OE is high, IOH −12 mA and IOL 12 mA max at VCC = 3 V. |
| 5 | OE | input | Active-low output enable; when high, all outputs Y go to high-impedance state; when low, outputs follow input A. LVTTL-compatible, input voltage range 0 V to 5.5 V. |
| 6 | A | input | Clock input that is distributed to the 10 outputs; LVTTL-compatible, input voltage range 0 V to 5.5 V, input clock frequency up to 100 MHz. |
| 7 | P0 | input | Factory propagation-delay adjustment pin, not intended for customer use; it should be connected to GND. |
| 8 | P1 | input | Factory propagation-delay adjustment pin, not intended for customer use; it should be connected to GND. |
| 9 | Y8 | output | Clock output 8 with internal series damping resistor; tri-stated (high impedance) when OE is high, IOH −12 mA and IOL 12 mA max at VCC = 3 V. |
| 10 | VCC | power_in | Supply pin; recommended operating supply voltage is 3 V to 3.6 V (nominal 3.3 V). |
| 11 | Y7 | output | Clock output 7 with internal series damping resistor; tri-stated (high impedance) when OE is high, IOH −12 mA and IOL 12 mA max at VCC = 3 V. |
| 12 | GND | power_in | Ground reference pin; the datasheet notes distributed VCC and ground pins are used to reduce switching noise. |
| 13 | GND | power_in | Ground reference pin; the datasheet notes distributed VCC and ground pins are used to reduce switching noise. |
| 14 | Y6 | output | Clock output 6 with internal series damping resistor; tri-stated (high impedance) when OE is high, IOH −12 mA and IOL 12 mA max at VCC = 3 V. |
| 15 | VCC | power_in | Supply pin; recommended operating supply voltage is 3 V to 3.6 V (nominal 3.3 V). |
| 16 | Y5 | output | Clock output 5 with internal series damping resistor; tri-stated (high impedance) when OE is high, IOH −12 mA and IOL 12 mA max at VCC = 3 V. |
| 17 | GND | power_in | Ground reference pin; the datasheet notes distributed VCC and ground pins are used to reduce switching noise. |
| 18 | Y4 | output | Clock output 4 with internal series damping resistor; tri-stated (high impedance) when OE is high, IOH −12 mA and IOL 12 mA max at VCC = 3 V. |
| 19 | Y3 | output | Clock output 3 with internal series damping resistor; tri-stated (high impedance) when OE is high, IOH −12 mA and IOL 12 mA max at VCC = 3 V. |
| 20 | GND | power_in | Ground reference pin; the datasheet notes distributed VCC and ground pins are used to reduce switching noise. |
| 21 | Y2 | output | Clock output 2 with internal series damping resistor; tri-stated (high impedance) when OE is high, IOH −12 mA and IOL 12 mA max at VCC = 3 V. |
| 22 | VCC | power_in | Supply pin; recommended operating supply voltage is 3 V to 3.6 V (nominal 3.3 V). |
| 23 | Y1 | output | Clock output 1 with internal series damping resistor; tri-stated (high impedance) when OE is high, IOH −12 mA and IOL 12 mA max at VCC = 3 V. |
| 24 | GND | power_in | Ground reference pin; the datasheet notes distributed VCC and ground pins are used to reduce switching noise. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SSOP-24-208mil |
| Category | RTC/Clock Chip |
| Pins | 24 |
CAD (KiCad official)
- Symbol:
CDC2351MDBREP - Footprint:
Package_SO:SSOP-24_5.3x8.2mm_P0.65mm - 3D model: SSOP-24-208mil (KiCad packages3D, STEP)
- 3D model files:
cdc2351mdbrep-etched.step/cdc2351mdbrep-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cdc2351mdbrep.step/cdc2351mdbrep.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (11 pp, sha256
d6a230475d6886db, retrieved 2026-10-08, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).