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CD74HCT86M96

Public Made by Adom

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Texas Instruments Logic Gates, SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
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docs cd74hct86m96: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers cd74hct86m96: viewers · Ray
cd74hct86m96-etched.fit.json cd74hct86m96: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
cd74hct86m96-etched.glb cd74hct86m96: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC bod… · Ray
cd74hct86m96-etched.step cd74hct86m96: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC bod… · Ray
cd74hct86m96.glb Publish 0.1.0 · Ray
cd74hct86m96.kicad_mod Publish 0.1.0 · Ray
cd74hct86m96.kicad_sym Publish 0.1.0 · Ray
cd74hct86m96.lbr Publish 0.1.0 · Ray
cd74hct86m96.step Publish 0.1.0 · Ray
package.json cd74hct86m96: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC bod… · Ray
page.json cd74hct86m96: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC bod… · Ray
README.md Initial commit: component/cd74hct86m96 · Ray

CD74HCT86M96

Texas Instruments · Logic Gates · SOIC-14

CD74HCT86M96 from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1A input Channel 1 XOR input A, accepts TTL-compatible CMOS logic levels from 0 to VCC
2 1B input Channel 1 XOR input B, accepts TTL-compatible CMOS logic levels from 0 to VCC
3 1Y output Channel 1 XOR output Y, balanced push-pull CMOS driver with ±25 mA continuous output current rating
4 2A input Channel 2 XOR input A, accepts TTL-compatible CMOS logic levels from 0 to VCC
5 2B input Channel 2 XOR input B, accepts TTL-compatible CMOS logic levels from 0 to VCC
6 2Y output Channel 2 XOR output Y, balanced push-pull CMOS driver with ±25 mA continuous output current rating
7 GND power_in Ground, reference potential for all logic and power circuits
8 3Y output Channel 3 XOR output Y, balanced push-pull CMOS driver with ±25 mA continuous output current rating
9 3A input Channel 3 XOR input A, accepts TTL-compatible CMOS logic levels from 0 to VCC
10 3B input Channel 3 XOR input B, accepts TTL-compatible CMOS logic levels from 0 to VCC
11 4Y output Channel 4 XOR output Y, balanced push-pull CMOS driver with ±25 mA continuous output current rating
12 4A input Channel 4 XOR input A, accepts TTL-compatible CMOS logic levels from 0 to VCC
13 4B input Channel 4 XOR input B, accepts TTL-compatible CMOS logic levels from 0 to VCC
14 VCC power_in Positive supply voltage, operating range 4.5 V to 5.5 V recommended

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-14
Category Logic
Pins 14

CAD (KiCad official)

  • Symbol: CD74HCT86M96
  • Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
  • 3D model: SOIC-14 (KiCad packages3D, STEP)
  • 3D model files: cd74hct86m96-etched.step / cd74hct86m96-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cd74hct86m96.step / cd74hct86m96.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (26 pp, sha256 2d3c75127006092a, retrieved 2026-09-22, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF