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CD74HCT75M

Texas Instruments · Latches · SOIC-16

CD74HCT75M from Texas Instruments, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	1Q0̅	output	Complementary output of latch 0 of the first 2-bit latch; drives 10 LSTTL loads (standard output).
2	1D0	input	Data input 0 of the first latch (HCT: VIH 2V min, VIL 0.8V max, 0.8 unit load).
3	1D1	input	Data input 1 of the first latch (HCT: VIH 2V min, VIL 0.8V max, 0.8 unit load).
4	2E	input	Enable input for the second 2-bit latch; data enters the latch and appears at Q when E is HIGH, output is not affected when LOW (1.2 unit loads).
5	VCC	power_in	Supply voltage, 4.5V to 5.5V for HCT types (absolute maximum -0.5V to 7V).
6	2D0	input	Data input 0 of the second latch (HCT: VIH 2V min, VIL 0.8V max, 0.8 unit load).
7	2D1	input	Data input 1 of the second latch (HCT: VIH 2V min, VIL 0.8V max, 0.8 unit load).
8	2Q1̅	output	Complementary output of latch 1 of the second 2-bit latch; drives 10 LSTTL loads (standard output).
9	2Q1	output	True output of latch 1 of the second 2-bit latch; drives 10 LSTTL loads (standard output).
10	2Q0	output	True output of latch 0 of the second 2-bit latch; drives 10 LSTTL loads (standard output).
11	2Q0̅	output	Complementary output of latch 0 of the second 2-bit latch; drives 10 LSTTL loads (standard output).
12	GND	power_in	Ground (0V reference); DC VCC or ground current limit is ±50mA.
13	1E	input	Enable input for the first 2-bit latch; data enters the latch and appears at Q when E is HIGH, output is not affected when LOW (1.2 unit loads).
14	1Q1̅	output	Complementary output of latch 1 of the first 2-bit latch; drives 10 LSTTL loads (standard output).
15	1Q1	output	True output of latch 1 of the first 2-bit latch; drives 10 LSTTL loads (standard output).
16	1Q0	output	True output of latch 0 of the first 2-bit latch; drives 10 LSTTL loads (standard output).

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	SOIC-16
Category	Logic
Pins	16

CAD (KiCad official)

Symbol: CD74HCT75M
Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
3D model: SOIC-16 (KiCad packages3D, STEP)
3D model files: cd74hct75m-etched.step / cd74hct75m-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cd74hct75m.step / cd74hct75m.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (19 pp, sha256 215c79a298430f56, retrieved 2026-10-05, tier: lcsc)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF