component
CD74HCT74M96
Public Made by Adomby adom
Texas Instruments Flip Flops, SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 2d ago |
| viewers | 2d ago |
| cd74hct74m96-etched.glb | 2d ago |
| cd74hct74m96-etched.step | 2d ago |
| cd74hct74m96-hero.glb | 1d ago |
| cd74hct74m96-hero.overlay.json | 2d ago |
| cd74hct74m96.glb | 2d ago |
| cd74hct74m96.kicad_mod | 2d ago |
| cd74hct74m96.kicad_sym | 2d ago |
| cd74hct74m96.lbr | 2d ago |
| cd74hct74m96.step | 2d ago |
| package.json | 2d ago |
| page.json | 2d ago |
| README.md | 2d ago |
CD74HCT74M96
Texas Instruments · Flip Flops · SOIC-14
CD74HCT74M96 from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1CLR | input | Channel 1 clear input, active low; a low level forces 1Q low and 1Q̄ high, independent of the clock. |
| 2 | 1D | input | Channel 1 data input, transferred to the outputs on the positive edge of 1CLK and subject to setup and hold times. |
| 3 | 1CLK | input | Channel 1 positive-edge-triggered clock input. |
| 4 | 1PRE | input | Channel 1 preset input, active low; a low level forces 1Q high and 1Q̄ low, independent of the clock. |
| 5 | 1Q | output | Channel 1 output. |
| 6 | 1Q̄ | output | Channel 1 inverted output. |
| 7 | GND | power_in | Ground reference for the device. |
| 8 | 2Q̄ | output | Channel 2 inverted output. |
| 9 | 2Q | output | Channel 2 output. |
| 10 | 2PRE | input | Channel 2 preset input, active low; a low level forces 2Q high and 2Q̄ low, independent of the clock. |
| 11 | 2CLK | input | Channel 2 positive-edge-triggered clock input. |
| 12 | 2D | input | Channel 2 data input, transferred to the outputs on the positive edge of 2CLK and subject to setup and hold times. |
| 13 | 2CLR | input | Channel 2 clear input, active low; a low level forces 2Q low and 2Q̄ high, independent of the clock. |
| 14 | VCC | power_in | Positive supply; recommended operating range 4.5 V to 5.5 V, absolute maximum 7 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-14 |
| Category | Logic ICs |
| Pins | 14 |
CAD (KiCad official)
- Symbol:
CD74HCT74M96 - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOIC-14 (KiCad packages3D, STEP)
- 3D model files:
cd74hct74m96-etched.step/cd74hct74m96-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cd74hct74m96.step/cd74hct74m96.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (28 pp, sha256
b68442e945cd3153, retrieved 2026-10-08, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).