component
CD74HCT688E
Public Made by Adomby adom
Texas Instruments Pre-ordered Chips, PDIP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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CD74HCT688E
Texas Instruments · Pre-ordered Chips · PDIP-20
CD74HCT688E from Texas Instruments, in a PDIP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | E | input | Active-low enable input; when E is high, output Y is forced high regardless of the A and B inputs. |
| 2 | A0 | input | Word A data input bit 0, compared against B0. |
| 3 | B0 | input | Word B data input bit 0, compared against A0. |
| 4 | A1 | input | Word A data input bit 1, compared against B1. |
| 5 | B1 | input | Word B data input bit 1, compared against A1. |
| 6 | A2 | input | Word A data input bit 2, compared against B2. |
| 7 | B2 | input | Word B data input bit 2, compared against A2. |
| 8 | A3 | input | Word A data input bit 3, compared against B3. |
| 9 | B3 | input | Word B data input bit 3, compared against A3. |
| 10 | GND | power_in | Ground reference for the device. |
| 11 | A4 | input | Word A data input bit 4, compared against B4. |
| 12 | B4 | input | Word B data input bit 4, compared against A4. |
| 13 | A5 | input | Word A data input bit 5, compared against B5. |
| 14 | B5 | input | Word B data input bit 5, compared against A5. |
| 15 | A6 | input | Word A data input bit 6, compared against B6. |
| 16 | B6 | input | Word B data input bit 6, compared against A6. |
| 17 | A7 | input | Word A data input bit 7, compared against B7. |
| 18 | B7 | input | Word B data input bit 7, compared against A7. |
| 19 | Y | output | Comparator output, low when A equals B and E is low, usable as enable input to a cascaded device. |
| 20 | VCC | power_in | Positive supply voltage, 4.5 V to 5.5 V for HCT types, with a 0.1-µF bypass capacitor recommended. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | PDIP-20 |
| Category | Interface ICs |
| Pins | 20 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VCC | -0.5 | 7 | V | 4 | ||
| Input diode current | IIK | -20 | 20 | mA | For VI < -0.5 V or VI > VCC + 0.5 V | 4 | |
| Output diode current | IOK | -20 | 20 | mA | For VO < -0.5 V or VO > VCC + 0.5 V | 4 | |
| Output source or sink current per output pin | IO | -25 | 25 | mA | For VO > -0.5 V or VO < VCC + 0.5 V | 4 | |
| Continuous current through VCC or GND | -50 | 50 | mA | 4 | |||
| Junction temperature | TJ | 150 | °C | 4 | |||
| Storage temperature range | Tstg | -65 | 150 | °C | 4 | ||
| Lead temperature (soldering) | 300 | °C | Soldering 10 s, SOIC lead tips only | 4 | |||
| Supply voltage range (HCT types) | VCC | 4.5 | 5.5 | V | HCT types | 4 | |
| Input or output voltage | VI, VO | 0 | V | Maximum printed as VCC | 4 | ||
| Input rise and fall time | tt | 500 | ns | VCC = 4.5 V | 4 | ||
| Temperature range | TA | -55 | 125 | ℃ | 4 | ||
| Junction-to-ambient thermal resistance (PDIP, N) | RθJA | 84.6 | °C/W | PDIP (N) 20-pin package | 4 | ||
| Junction-to-case (top) thermal resistance (PDIP, N) | RθJC(top) | 72.5 | °C/W | PDIP (N) 20-pin package | 4 | ||
| Junction-to-board thermal resistance (PDIP, N) | RθJB | 65.3 | °C/W | PDIP (N) 20-pin package | 4 | ||
| Junction-to-top characterization parameter (PDIP, N) | ψJT | 55.3 | °C/W | PDIP (N) 20-pin package | 4 | ||
| Junction-to-board characterization parameter (PDIP, N) | ψJB | 65.2 | °C/W | PDIP (N) 20-pin package | 4 | ||
| High level input voltage | VIH | 2 | V | VCC 4.5 to 5.5 V | 5 | ||
| Low level input voltage | VIL | 0.8 | V | VCC 4.5 to 5.5 V | 5 | ||
| High level output voltage | VOH | 4.4 | V | IOH = -20 μA, VCC 4.5 V | 5 | ||
| High level output voltage | VOH | 3.98 | V | IOH = -4 mA, VCC 4.5 V, TA = 25°C | 5 | ||
| High level output voltage | VOH | 3.84 | V | IOH = -4 mA, VCC 4.5 V, TA = -40 to 85°C | 5 | ||
| High level output voltage | VOH | 3.7 | V | IOH = -4 mA, VCC 4.5 V, TA = -55 to 125°C | 5 | ||
| Low level output voltage | VOL | 0.1 | V | IOL = 20 μA, VCC 4.5 V | 5 | ||
| Low level output voltage | VOL | 0.26 | V | IOL = 4 mA, VCC 4.5 V, TA = 25°C | 5 | ||
| Low level output voltage | VOL | 0.33 | V | IOL = 4 mA, VCC 4.5 V, TA = -40 to 85°C | 5 | ||
| Low level output voltage | VOL | 0.4 | V | IOL = 4 mA, VCC 4.5 V, TA = -55 to 125°C | 5 | ||
| Input leakage current | II | -0.1 | 0.1 | μA | VI = VCC or GND, VCC 5.5 V, TA = 25°C | 5 | |
| Input leakage current | II | -1 | 1 | μA | VI = VCC or GND, VCC 5.5 V, TA = -40 to 85°C | 5 | |
| Supply current | ICC | 8 | μA | VI = VCC or GND, VCC 5.5 V, TA = 25°C | 5 | ||
| Supply current | ICC | 80 | μA | VI = VCC or GND, VCC 5.5 V, TA = -40 to 85°C | 5 | ||
| Supply current | ICC | 160 | μA | VI = VCC or GND, VCC 5.5 V, TA = -55 to 125°C | 5 | ||
| Additional supply current per input pin (enable inputs) | ΔICC | 100 | 252 | μA | Enable inputs held at VCC -2.1, VCC 4.5 to 5.5 V, TA = 25°C | 5 | |
| Additional supply current per input pin (enable inputs) | ΔICC | 315 | μA | Enable inputs held at VCC -2.1, VCC 4.5 to 5.5 V, TA = -40 to 85°C | 5 | ||
| Additional supply current per input pin (enable inputs) | ΔICC | 343 | μA | Enable inputs held at VCC -2.1, VCC 4.5 to 5.5 V, TA = -55 to 125°C | 5 | ||
| Additional supply current per input pin (data inputs) | ΔICC | 100 | 126 | μA | Data inputs held at VCC -2.1, VCC 4.5 to 5.5 V, TA = 25°C | 5 | |
| Additional supply current per input pin (data inputs) | ΔICC | 157.5 | μA | Data inputs held at VCC -2.1, VCC 4.5 to 5.5 V, TA = -40 to 85°C | 5 | ||
| Additional supply current per input pin (data inputs) | ΔICC | 171.5 | μA | Data inputs held at VCC -2.1, VCC 4.5 to 5.5 V, TA = -55 to 125°C | 5 | ||
| Propagation delay An to output | tPLH, tPHL | 14 | 34 | ns | CL = 50 pF, input tr,tf = 6 ns, VCC 4.5 V, TA = 25°C | 6 | |
| Propagation delay An to output | tPLH, tPHL | 42 | ns | CL = 50 pF, input tr,tf = 6 ns, VCC 4.5 V, TA = -40 to 85°C | 6 | ||
| Propagation delay An to output | tPLH, tPHL | 51 | ns | CL = 50 pF, input tr,tf = 6 ns, VCC 4.5 V, TA = -55 to 125°C | 6 | ||
| Propagation delay Bn to output | tPLH, tPHL | 14 | 34 | ns | CL = 50 pF, input tr,tf = 6 ns, VCC 4.5 V, TA = 25°C | 6 | |
| Propagation delay Bn to output | tPLH, tPHL | 42 | ns | CL = 50 pF, input tr,tf = 6 ns, VCC 4.5 V, TA = -40 to 85°C | 6 | ||
| Propagation delay Bn to output | tPLH, tPHL | 51 | ns | CL = 50 pF, input tr,tf = 6 ns, VCC 4.5 V, TA = -55 to 125°C | 6 | ||
| Propagation delay E to output | tPLH, tPHL | 9 | 24 | ns | CL = 50 pF, input tr,tf = 6 ns, VCC 4.5 V, TA = 25°C | 6 | |
| Propagation delay E to output | tPLH, tPHL | 30 | ns | CL = 50 pF, input tr,tf = 6 ns, VCC 4.5 V, TA = -40 to 85°C | 6 | ||
| Propagation delay E to output | tPLH, tPHL | 36 | ns | CL = 50 pF, input tr,tf = 6 ns, VCC 4.5 V, TA = -55 to 125°C | 6 | ||
| Output transition time | tTLH, tTHL | 15 | ns | CL = 50 pF, input tr,tf = 6 ns, VCC 4.5 V, TA = 25°C | 6 | ||
| Output transition time | tTLH, tTHL | 19 | ns | CL = 50 pF, input tr,tf = 6 ns, VCC 4.5 V, TA = -40 to 85°C | 6 | ||
| Output transition time | tTLH, tTHL | 22 | ns | CL = 50 pF, input tr,tf = 6 ns, VCC 4.5 V, TA = -55 to 125°C | 6 |
CAD (KiCad official)
- Symbol:
CD74HCT688E - Footprint:
Package_DIP:DIP-20_W7.62mm - 3D model: PDIP-20 (KiCad packages3D, STEP)
- 3D model files:
cd74hct688e-etched.step/cd74hct688e-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cd74hct688e.step/cd74hct688e.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (26 pp, sha256
871c1ed3b22e27bf, retrieved 2026-10-30, tier: manufacturer) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# CD74HCT688E
**Texas Instruments** · Pre-ordered Chips · PDIP-20
CD74HCT688E from Texas Instruments, in a PDIP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | E | input | Active-low enable input; when E is high, output Y is forced high regardless of the A and B inputs. |
| 2 | A0 | input | Word A data input bit 0, compared against B0. |
| 3 | B0 | input | Word B data input bit 0, compared against A0. |
| 4 | A1 | input | Word A data input bit 1, compared against B1. |
| 5 | B1 | input | Word B data input bit 1, compared against A1. |
| 6 | A2 | input | Word A data input bit 2, compared against B2. |
| 7 | B2 | input | Word B data input bit 2, compared against A2. |
| 8 | A3 | input | Word A data input bit 3, compared against B3. |
| 9 | B3 | input | Word B data input bit 3, compared against A3. |
| 10 | GND | power_in | Ground reference for the device. |
| 11 | A4 | input | Word A data input bit 4, compared against B4. |
| 12 | B4 | input | Word B data input bit 4, compared against A4. |
| 13 | A5 | input | Word A data input bit 5, compared against B5. |
| 14 | B5 | input | Word B data input bit 5, compared against A5. |
| 15 | A6 | input | Word A data input bit 6, compared against B6. |
| 16 | B6 | input | Word B data input bit 6, compared against A6. |
| 17 | A7 | input | Word A data input bit 7, compared against B7. |
| 18 | B7 | input | Word B data input bit 7, compared against A7. |
| 19 | Y | output | Comparator output, low when A equals B and E is low, usable as enable input to a cascaded device. |
| 20 | VCC | power_in | Positive supply voltage, 4.5 V to 5.5 V for HCT types, with a 0.1-µF bypass capacitor recommended. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | PDIP-20 |
| Category | Interface ICs |
| Pins | 20 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VCC | -0.5 | | 7 | V | | 4 |
| Input diode current | IIK | -20 | | 20 | mA | For VI < -0.5 V or VI > VCC + 0.5 V | 4 |
| Output diode current | IOK | -20 | | 20 | mA | For VO < -0.5 V or VO > VCC + 0.5 V | 4 |
| Output source or sink current per output pin | IO | -25 | | 25 | mA | For VO > -0.5 V or VO < VCC + 0.5 V | 4 |
| Continuous current through VCC or GND | | -50 | | 50 | mA | | 4 |
| Junction temperature | TJ | | | 150 | °C | | 4 |
| Storage temperature range | Tstg | -65 | | 150 | °C | | 4 |
| Lead temperature (soldering) | | | | 300 | °C | Soldering 10 s, SOIC lead tips only | 4 |
| Supply voltage range (HCT types) | VCC | 4.5 | | 5.5 | V | HCT types | 4 |
| Input or output voltage | VI, VO | 0 | | | V | Maximum printed as VCC | 4 |
| Input rise and fall time | tt | | | 500 | ns | VCC = 4.5 V | 4 |
| Temperature range | TA | -55 | | 125 | ℃ | | 4 |
| Junction-to-ambient thermal resistance (PDIP, N) | RθJA | | 84.6 | | °C/W | PDIP (N) 20-pin package | 4 |
| Junction-to-case (top) thermal resistance (PDIP, N) | RθJC(top) | | 72.5 | | °C/W | PDIP (N) 20-pin package | 4 |
| Junction-to-board thermal resistance (PDIP, N) | RθJB | | 65.3 | | °C/W | PDIP (N) 20-pin package | 4 |
| Junction-to-top characterization parameter (PDIP, N) | ψJT | | 55.3 | | °C/W | PDIP (N) 20-pin package | 4 |
| Junction-to-board characterization parameter (PDIP, N) | ψJB | | 65.2 | | °C/W | PDIP (N) 20-pin package | 4 |
| High level input voltage | VIH | 2 | | | V | VCC 4.5 to 5.5 V | 5 |
| Low level input voltage | VIL | | | 0.8 | V | VCC 4.5 to 5.5 V | 5 |
| High level output voltage | VOH | 4.4 | | | V | IOH = -20 μA, VCC 4.5 V | 5 |
| High level output voltage | VOH | 3.98 | | | V | IOH = -4 mA, VCC 4.5 V, TA = 25°C | 5 |
| High level output voltage | VOH | 3.84 | | | V | IOH = -4 mA, VCC 4.5 V, TA = -40 to 85°C | 5 |
| High level output voltage | VOH | 3.7 | | | V | IOH = -4 mA, VCC 4.5 V, TA = -55 to 125°C | 5 |
| Low level output voltage | VOL | | | 0.1 | V | IOL = 20 μA, VCC 4.5 V | 5 |
| Low level output voltage | VOL | | | 0.26 | V | IOL = 4 mA, VCC 4.5 V, TA = 25°C | 5 |
| Low level output voltage | VOL | | | 0.33 | V | IOL = 4 mA, VCC 4.5 V, TA = -40 to 85°C | 5 |
| Low level output voltage | VOL | | | 0.4 | V | IOL = 4 mA, VCC 4.5 V, TA = -55 to 125°C | 5 |
| Input leakage current | II | -0.1 | | 0.1 | μA | VI = VCC or GND, VCC 5.5 V, TA = 25°C | 5 |
| Input leakage current | II | -1 | | 1 | μA | VI = VCC or GND, VCC 5.5 V, TA = -40 to 85°C | 5 |
| Supply current | ICC | | | 8 | μA | VI = VCC or GND, VCC 5.5 V, TA = 25°C | 5 |
| Supply current | ICC | | | 80 | μA | VI = VCC or GND, VCC 5.5 V, TA = -40 to 85°C | 5 |
| Supply current | ICC | | | 160 | μA | VI = VCC or GND, VCC 5.5 V, TA = -55 to 125°C | 5 |
| Additional supply current per input pin (enable inputs) | ΔICC | | 100 | 252 | μA | Enable inputs held at VCC -2.1, VCC 4.5 to 5.5 V, TA = 25°C | 5 |
| Additional supply current per input pin (enable inputs) | ΔICC | | | 315 | μA | Enable inputs held at VCC -2.1, VCC 4.5 to 5.5 V, TA = -40 to 85°C | 5 |
| Additional supply current per input pin (enable inputs) | ΔICC | | | 343 | μA | Enable inputs held at VCC -2.1, VCC 4.5 to 5.5 V, TA = -55 to 125°C | 5 |
| Additional supply current per input pin (data inputs) | ΔICC | | 100 | 126 | μA | Data inputs held at VCC -2.1, VCC 4.5 to 5.5 V, TA = 25°C | 5 |
| Additional supply current per input pin (data inputs) | ΔICC | | | 157.5 | μA | Data inputs held at VCC -2.1, VCC 4.5 to 5.5 V, TA = -40 to 85°C | 5 |
| Additional supply current per input pin (data inputs) | ΔICC | | | 171.5 | μA | Data inputs held at VCC -2.1, VCC 4.5 to 5.5 V, TA = -55 to 125°C | 5 |
| Propagation delay An to output | tPLH, tPHL | | 14 | 34 | ns | CL = 50 pF, input tr,tf = 6 ns, VCC 4.5 V, TA = 25°C | 6 |
| Propagation delay An to output | tPLH, tPHL | | | 42 | ns | CL = 50 pF, input tr,tf = 6 ns, VCC 4.5 V, TA = -40 to 85°C | 6 |
| Propagation delay An to output | tPLH, tPHL | | | 51 | ns | CL = 50 pF, input tr,tf = 6 ns, VCC 4.5 V, TA = -55 to 125°C | 6 |
| Propagation delay Bn to output | tPLH, tPHL | | 14 | 34 | ns | CL = 50 pF, input tr,tf = 6 ns, VCC 4.5 V, TA = 25°C | 6 |
| Propagation delay Bn to output | tPLH, tPHL | | | 42 | ns | CL = 50 pF, input tr,tf = 6 ns, VCC 4.5 V, TA = -40 to 85°C | 6 |
| Propagation delay Bn to output | tPLH, tPHL | | | 51 | ns | CL = 50 pF, input tr,tf = 6 ns, VCC 4.5 V, TA = -55 to 125°C | 6 |
| Propagation delay E to output | tPLH, tPHL | | 9 | 24 | ns | CL = 50 pF, input tr,tf = 6 ns, VCC 4.5 V, TA = 25°C | 6 |
| Propagation delay E to output | tPLH, tPHL | | | 30 | ns | CL = 50 pF, input tr,tf = 6 ns, VCC 4.5 V, TA = -40 to 85°C | 6 |
| Propagation delay E to output | tPLH, tPHL | | | 36 | ns | CL = 50 pF, input tr,tf = 6 ns, VCC 4.5 V, TA = -55 to 125°C | 6 |
| Output transition time | tTLH, tTHL | | | 15 | ns | CL = 50 pF, input tr,tf = 6 ns, VCC 4.5 V, TA = 25°C | 6 |
| Output transition time | tTLH, tTHL | | | 19 | ns | CL = 50 pF, input tr,tf = 6 ns, VCC 4.5 V, TA = -40 to 85°C | 6 |
| Output transition time | tTLH, tTHL | | | 22 | ns | CL = 50 pF, input tr,tf = 6 ns, VCC 4.5 V, TA = -55 to 125°C | 6 |
## CAD (KiCad official)
- Symbol: `CD74HCT688E`
- Footprint: `Package_DIP:DIP-20_W7.62mm`
- 3D model: PDIP-20 (KiCad packages3D, STEP)
- 3D model files: `cd74hct688e-etched.step` / `cd74hct688e-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `cd74hct688e.step` / `cd74hct688e.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/cd74hct688e.pdf) (26 pp, sha256 `871c1ed3b22e27bf`, retrieved 2026-10-30, tier: manufacturer)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/cd74hct688e-datasheet.pdf)