component
CD74HCT574PWR
Public Made by Adomby adom
Texas Instruments Flip Flops, TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+56@@ -0,0 +1,56 @@+# CD74HCT574PWR++**Texas Instruments** · Flip Flops · TSSOP-20++CD74HCT574PWR from Texas Instruments, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | OE | input | Active-low output enable; when HIGH the Q outputs are in the high-impedance state, independent of register operation. |+| 2 | D0 | input | Data input 0, latched on the LOW-to-HIGH transition of CP. |+| 3 | D1 | input | Data input 1, latched on the LOW-to-HIGH transition of CP. |+| 4 | D2 | input | Data input 2, latched on the LOW-to-HIGH transition of CP. |+| 5 | D3 | input | Data input 3, latched on the LOW-to-HIGH transition of CP. |+| 6 | D4 | input | Data input 4, latched on the LOW-to-HIGH transition of CP. |+| 7 | D5 | input | Data input 5, latched on the LOW-to-HIGH transition of CP. |+| 8 | D6 | input | Data input 6, latched on the LOW-to-HIGH transition of CP. |+| 9 | D7 | input | Data input 7, latched on the LOW-to-HIGH transition of CP. |+| 10 | GND | power_in | Ground. |+| 11 | CP | input | Clock input; data is entered into the registers on the LOW-to-HIGH transition. |+| 12 | Q7 | tri_state | 3-state flip-flop output 7, high-impedance when OE is HIGH; drives up to 15 LSTTL loads. |+| 13 | Q6 | tri_state | 3-state flip-flop output 6, high-impedance when OE is HIGH; drives up to 15 LSTTL loads. |+| 14 | Q5 | tri_state | 3-state flip-flop output 5, high-impedance when OE is HIGH; drives up to 15 LSTTL loads. |+| 15 | Q4 | tri_state | 3-state flip-flop output 4, high-impedance when OE is HIGH; drives up to 15 LSTTL loads. |+| 16 | Q3 | tri_state | 3-state flip-flop output 3, high-impedance when OE is HIGH; drives up to 15 LSTTL loads. |+| 17 | Q2 | tri_state | 3-state flip-flop output 2, high-impedance when OE is HIGH; drives up to 15 LSTTL loads. |+| 18 | Q1 | tri_state | 3-state flip-flop output 1, high-impedance when OE is HIGH; drives up to 15 LSTTL loads. |+| 19 | Q0 | tri_state | 3-state flip-flop output 0, high-impedance when OE is HIGH; drives up to 15 LSTTL loads. |+| 20 | VCC | power_in | Supply voltage, 4.5 V to 5.5 V for HCT types, with a 0.1-µF bypass capacitor recommended close to the pin. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | TSSOP-20 |+| Category | Logic |+| Pins | 20 |++## CAD (KiCad official)++- Symbol: `CD74HCT574PWR`+- Footprint: `Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm`+- 3D model: TSSOP-20 (KiCad packages3D, STEP)+- 3D model files: `cd74hct574pwr-etched.step` / `cd74hct574pwr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `cd74hct574pwr.step` / `cd74hct574pwr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/cd74hct574.pdf) (27 pp, sha256 `fca1397379cec05b`, retrieved 2026-10-08, tier: manufacturer)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/cd74hct574pwr-datasheet.pdf)
page.jsonadded+272@@ -0,0 +1,272 @@+{+ "slug": "cd74hct574pwr",+ "version": "0.1.0",+ "type": "component",+ "description": "Texas Instruments Flip Flops, TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "logic",+ "cd74hct574pwr",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "cd74hct574pwr.kicad_sym",+ "cd74hct574pwr.kicad_mod",+ "cd74hct574pwr.glb",+ "cd74hct574pwr.step",+ "cd74hct574pwr.lbr",+ "docs/hero.png",+ "docs/cd74hct574pwr-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "cd74hct574pwr-hero.glb",+ "cd74hct574pwr-hero.overlay.json"+ ],+ "component": {+ "mpn": "CD74HCT574PWR",+ "manufacturer": "Texas Instruments",+ "package": "TSSOP-20",+ "pin_count": 20,+ "category": "Logic",+ "subcategory": "Flip Flops",+ "datasheet": "https://www.ti.com/lit/ds/symlink/cd74hct574.pdf",+ "parts": {+ "symbol": "cd74hct574pwr.kicad_sym",+ "footprint": "cd74hct574pwr.kicad_mod",+ "model_3d": "cd74hct574pwr-hero.glb",+ "model_3d_plain": "cd74hct574pwr.glb",+ "model_3d_step": "cd74hct574pwr-etched.step",+ "model_3d_step_plain": "cd74hct574pwr.step",+ "lbr": "cd74hct574pwr.lbr"+ },+ "distributor_links": {+ "lcsc": "C2677898",+ "digikey": "296-17126-2-ND",+ "mouser": "595-CD74HCT574PWR"+ },+ "distributor_check": {+ "checked_at": "2026-10-08T00:23:23Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "296-17126-2-ND",+ "status": "found",+ "lifecycle": "Active"+ },+ "mouser": {+ "pn": "595-CD74HCT574PWR",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "OE",+ "type": "input",+ "description": "Active-low output enable; when HIGH the Q outputs are in the high-impedance state, independent of register operation."+ },+ {+ "number": "2",+ "name": "D0",+ "type": "input",+ "description": "Data input 0, latched on the LOW-to-HIGH transition of CP."+ },+ {+ "number": "3",+ "name": "D1",+ "type": "input",+ "description": "Data input 1, latched on the LOW-to-HIGH transition of CP."+ },+ {+ "number": "4",+ "name": "D2",+ "type": "input",+ "description": "Data input 2, latched on the LOW-to-HIGH transition of CP."+ },+ {+ "number": "5",+ "name": "D3",+ "type": "input",+ "description": "Data input 3, latched on the LOW-to-HIGH transition of CP."+ },+ {+ "number": "6",+ "name": "D4",+ "type": "input",+ "description": "Data input 4, latched on the LOW-to-HIGH transition of CP."+ },+ {+ "number": "7",+ "name": "D5",+ "type": "input",+ "description": "Data input 5, latched on the LOW-to-HIGH transition of CP."+ },+ {+ "number": "8",+ "name": "D6",+ "type": "input",+ "description": "Data input 6, latched on the LOW-to-HIGH transition of CP."+ },+ {+ "number": "9",+ "name": "D7",+ "type": "input",+ "description": "Data input 7, latched on the LOW-to-HIGH transition of CP."+ },+ {+ "number": "10",+ "name": "GND",+ "type": "power_in",+ "description": "Ground."+ },+ {+ "number": "11",+ "name": "CP",+ "type": "input",+ "description": "Clock input; data is entered into the registers on the LOW-to-HIGH transition."+ },+ {+ "number": "12",+ "name": "Q7",+ "type": "tri_state",+ "description": "3-state flip-flop output 7, high-impedance when OE is HIGH; drives up to 15 LSTTL loads."+ },+ {+ "number": "13",+ "name": "Q6",+ "type": "tri_state",+ "description": "3-state flip-flop output 6, high-impedance when OE is HIGH; drives up to 15 LSTTL loads."+ },+ {+ "number": "14",+ "name": "Q5",+ "type": "tri_state",+ "description": "3-state flip-flop output 5, high-impedance when OE is HIGH; drives up to 15 LSTTL loads."+ },+ {+ "number": "15",+ "name": "Q4",+ "type": "tri_state",+ "description": "3-state flip-flop output 4, high-impedance when OE is HIGH; drives up to 15 LSTTL loads."+ },+ {+ "number": "16",+ "name": "Q3",+ "type": "tri_state",+ "description": "3-state flip-flop output 3, high-impedance when OE is HIGH; drives up to 15 LSTTL loads."+ },+ {+ "number": "17",+ "name": "Q2",+ "type": "tri_state",+ "description": "3-state flip-flop output 2, high-impedance when OE is HIGH; drives up to 15 LSTTL loads."+ },+ {+ "number": "18",+ "name": "Q1",+ "type": "tri_state",+ "description": "3-state flip-flop output 1, high-impedance when OE is HIGH; drives up to 15 LSTTL loads."+ },+ {+ "number": "19",+ "name": "Q0",+ "type": "tri_state",+ "description": "3-state flip-flop output 0, high-impedance when OE is HIGH; drives up to 15 LSTTL loads."+ },+ {+ "number": "20",+ "name": "VCC",+ "type": "power_in",+ "description": "Supply voltage, 4.5 V to 5.5 V for HCT types, with a 0.1-µF bypass capacitor recommended close to the pin."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-sonnet-5-5",+ "primary_mode": "text+vision",+ "consensus_model": "claude-opus-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "vision extraction: provenance cannot be text-verified; needs consensus"+ ],+ "pages_sent": 27,+ "cost_usd": 0.5785,+ "at": "2026-10-08T00:23:05"+ },+ "datasheet": {+ "url": "https://www.ti.com/lit/ds/symlink/cd74hct574.pdf",+ "pages": 27,+ "sha256": "fca1397379cec05b",+ "source_tier": "mfr"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 20,+ "described": 20,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "cd74hct574pwr.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6.4,+ 6.5,+ 1.2+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "97339947f3a7196470ec2f1d9f9b92bb2fc2ab66ad53be0cf105192585ef3c9a",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "cd74hct574pwr-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6.4,+ 6.5,+ 1.2+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "98b7ded8a6759c177771b1ca882e3aa5e0e2dc484f3012be203bc2f097092d69",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}