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CD74HCT541M96

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by adom

Texas Instruments Buffers, Drivers, Receivers, Transceivers, SOIC-20-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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docs cd74hct541m96: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers cd74hct541m96: viewers · Ray
cd74hct541m96-etched.fit.json cd74hct541m96: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
cd74hct541m96-etched.glb cd74hct541m96: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
cd74hct541m96-etched.step cd74hct541m96: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
cd74hct541m96.glb Publish 0.1.0 · Ray
cd74hct541m96.kicad_mod Publish 0.1.0 · Ray
cd74hct541m96.kicad_sym Publish 0.1.0 · Ray
cd74hct541m96.lbr Publish 0.1.0 · Ray
cd74hct541m96.step Publish 0.1.0 · Ray
package.json cd74hct541m96: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray
page.json cd74hct541m96: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray
README.md Initial commit: component/cd74hct541m96 · Ray

CD74HCT541M96

Texas Instruments · Buffers, Drivers, Receivers, Transceivers · SOIC-20-300mil

CD74HCT541M96 from Texas Instruments, in a SOIC-20-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OE1 input Active-low output enable 1; when either OE1 or OE2 is high the Y outputs go to high-impedance (three-state); both OE1 and OE2 must be low for the buffered data to appear on the outputs.
2 A0 input Buffered data input 0 to the octal noninverting buffer/line driver.
3 A1 input Buffered data input 1 to the octal noninverting buffer/line driver.
4 A2 input Buffered data input 2 to the octal noninverting buffer/line driver.
5 A3 input Buffered data input 3 to the octal noninverting buffer/line driver.
6 A4 input Buffered data input 4 to the octal noninverting buffer/line driver.
7 A5 input Buffered data input 5 to the octal noninverting buffer/line driver.
8 A6 input Buffered data input 6 to the octal noninverting buffer/line driver.
9 A7 input Buffered data input 7 to the octal noninverting buffer/line driver.
10 GND power_in Ground (0 V) supply reference pin.
11 Y7 tri_state Three-state noninverting buffered output 7, corresponding to A7; capable of driving 15 LSTTL loads; high impedance when OE1 or OE2 is high.
12 Y6 tri_state Three-state noninverting buffered output 6, corresponding to A6; capable of driving 15 LSTTL loads; high impedance when OE1 or OE2 is high.
13 Y5 tri_state Three-state noninverting buffered output 5, corresponding to A5; capable of driving 15 LSTTL loads; high impedance when OE1 or OE2 is high.
14 Y4 tri_state Three-state noninverting buffered output 4, corresponding to A4; capable of driving 15 LSTTL loads; high impedance when OE1 or OE2 is high.
15 Y3 tri_state Three-state noninverting buffered output 3, corresponding to A3; capable of driving 15 LSTTL loads; high impedance when OE1 or OE2 is high.
16 Y2 tri_state Three-state noninverting buffered output 2, corresponding to A2; capable of driving 15 LSTTL loads; high impedance when OE1 or OE2 is high.
17 Y1 tri_state Three-state noninverting buffered output 1, corresponding to A1; capable of driving 15 LSTTL loads; high impedance when OE1 or OE2 is high.
18 Y0 tri_state Three-state noninverting buffered output 0, corresponding to A0; capable of driving 15 LSTTL loads; high impedance when OE1 or OE2 is high.
19 OE2 input Active-low output enable 2; when either OE1 or OE2 is high the Y outputs go to high-impedance (three-state); both OE1 and OE2 must be low for the buffered data to appear on the outputs.
20 VCC power_in Positive supply voltage; for the HCT types the recommended operating range is 4.5 V to 5.5 V.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-20-300mil
Category Logic
Pins 20

CAD (KiCad official)

  • Symbol: CD74HCT541M96
  • Footprint: Package_SO:SOIC-20W_7.5x12.8mm_P1.27mm
  • 3D model: SOIC-20-300mil (KiCad packages3D, STEP)
  • 3D model files: cd74hct541m96-etched.step / cd74hct541m96-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cd74hct541m96.step / cd74hct541m96.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (26 pp, sha256 ba8ee53bc2089063, retrieved 2026-09-23, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-sonnet-5 (text+vision), consensus claude-opus-4-8 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF