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CD74HCT4052M
Public Made by Adomby adom
Texas Instruments Analog Switches, Multiplexers, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownCD74HCT4052M
Texas Instruments · Analog Switches, Multiplexers · SOIC-16
CD74HCT4052M from Texas Instruments, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CH B0 | bidirectional | Channel B0 analog input/output of the B switch bank, which passes analog signals between VEE and VCC when enabled. |
| 2 | CH B2 | bidirectional | Channel B2 analog input/output of the B switch bank, which passes analog signals between VEE and VCC when enabled. |
| 3 | COM B | bidirectional | Common B analog output/input that connects to the selected B channel, with analog switch voltage limited to VEE to VCC. |
| 4 | CH B3 | bidirectional | Channel B3 analog input/output of the B switch bank, which passes analog signals between VEE and VCC when enabled. |
| 5 | CH B1 | bidirectional | Channel B1 analog input/output of the B switch bank, which passes analog signals between VEE and VCC when enabled. |
| 6 | E | input | Active-low enable input; when driven high all switches are disabled to the off state, and control inputs must stay within 0 V to VCC. |
| 7 | VEE | power_in | Negative power supply input; the datasheet specifies VEE from 0 V to -6 V and VCC - VEE from 2 V to 10 V. |
| 8 | GND | power_in | Ground reference for all voltages; the datasheet states that all voltages are referenced to GND unless otherwise noted. |
| 9 | S1 | input | Channel select 1 control input, which together with S0 selects the active channel; logic levels are referenced to GND with VIH minimum 2 V and VIL maximum 0.8 V at 4.5 V to 5.5 V VCC. |
| 10 | S0 | input | Channel select 0 control input, which together with S1 selects the active channel; logic levels are referenced to GND with VIH minimum 2 V and VIL maximum 0.8 V at 4.5 V to 5.5 V VCC. |
| 11 | CH A3 | bidirectional | Channel A3 analog input/output of the A switch bank, which passes analog signals between VEE and VCC when enabled. |
| 12 | CH A0 | bidirectional | Channel A0 analog input/output of the A switch bank, which passes analog signals between VEE and VCC when enabled. |
| 13 | COM A | bidirectional | Common A analog input/output that connects to the selected A channel, with analog switch voltage limited to VEE to VCC. |
| 14 | CH A1 | bidirectional | Channel A1 analog input/output of the A switch bank, which passes analog signals between VEE and VCC when enabled. |
| 15 | CH A2 | bidirectional | Channel A2 analog input/output of the A switch bank, which passes analog signals between VEE and VCC when enabled. |
| 16 | VCC | power_in | Positive power supply input; the datasheet specifies VCC from 2 V to 6 V (HC) and 4.5 V to 5.5 V (HCT), with VCC - VEE up to 10 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-16 |
| Category | Interface |
| Pins | 16 |
CAD (KiCad official)
- Symbol:
CD74HCT4052M - Footprint:
Package_SO:SOIC-16_3.9x9.9mm_P1.27mm - 3D model: SOIC-16 (KiCad packages3D, STEP)
- 3D model files:
cd74hct4052m-etched.step/cd74hct4052m-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cd74hct4052m.step/cd74hct4052m.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (50 pp, sha256
cc5bd993625a4388, retrieved 2026-10-08, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).