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CD74HCT221M96

Public Made by Adom

by adom

Texas Instruments Monostable Multivibrators, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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CD74HCT221M96

Texas Instruments · Monostable Multivibrators · SOIC-16

CD74HCT221M96 from Texas Instruments, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1A input Mono 1 trailing-edge (high-to-low) trigger input; terminate high or low if Mono 1 is unused.
2 1B input Mono 1 leading-edge (low-to-high) Schmitt-trigger input, with unlimited allowed rise/fall time; terminate high or low if unused.
3 1R input Mono 1 active-low reset; a LOW level terminates the output pulse.
4 1Q̄ output Mono 1 buffered complementary output (low-going pulse), 10 LSTTL loads standard or 15 for bus-driver outputs.
5 2Q output Mono 2 buffered output (high-going pulse), 10 LSTTL loads standard or 15 for bus-driver outputs.
6 2CX passive Mono 2 external timing capacitor connection (CX minimum 0pF).
7 2CXRX passive Mono 2 external timing resistor/capacitor junction (RX minimum typically 500Ω; tW = 0.7 RX CX at VCC = 4.5V).
8 GND power_in Ground.
9 2A input Mono 2 trailing-edge (high-to-low) trigger input; terminate high or low if Mono 2 is unused.
10 2B input Mono 2 leading-edge (low-to-high) Schmitt-trigger input; terminate high or low if unused.
11 2R input Mono 2 active-low reset; a LOW level terminates the output pulse.
12 2Q̄ output Mono 2 buffered complementary output (low-going pulse), 10 LSTTL loads standard or 15 for bus-driver outputs.
13 1Q output Mono 1 buffered output (high-going pulse), 10 LSTTL loads standard or 15 for bus-driver outputs.
14 1CX passive Mono 1 external timing capacitor connection (CX minimum 0pF).
15 1CXRX passive Mono 1 external timing resistor/capacitor junction (RX minimum typically 500Ω; tW = 0.7 RX CX at VCC = 4.5V).
16 VCC power_in Supply voltage, 4.5V to 5.5V for HCT types (absolute max -0.5V to 7V).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-16
Category Logic
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply Voltage Range, HCT Types VCC 4.5 5.5 V HCT types 4
Temperature Range TA -55 125 °C 4
DC Input or Output Voltage VI, VO 0 V Maximum is VCC 4
Input Rise and Fall Time on Inputs A and R tr, tf 500 ns VCC = 4.5 V 4
DC Supply Voltage VCC -0.5 7 V 4
DC Input Diode Current IIK -20 20 mA For VI < -0.5 V or VI > VCC + 0.5 V 4
DC Output Diode Current IOK -20 20 mA For VO < -0.5 V or VO > VCC + 0.5 V 4
DC Drain Current, per Output IO -25 25 mA For -0.5 V < VO < VCC + 0.5 V 4
DC Output Source or Sink Current per Output Pin IO -25 25 mA For VO > -0.5 V or VO < VCC + 0.5 V 4
DC VCC or Ground Current ICC -50 50 mA 4
Maximum Storage Temperature Range -65 150 °C 4
Maximum Junction Temperature (Plastic Package) 150 °C 4
Maximum Lead Temperature (Soldering) 300 °C 10 s; SOIC lead tips only 4
High Level Input Voltage VIH 2 V VCC 4.5 to 5.5 V; all temperature ranges 5
Low Level Input Voltage VIL 0.8 V VCC 4.5 to 5.5 V; all temperature ranges 5
High Level Output Voltage, CMOS Loads (all temperature ranges) VOH 4.4 V VI = VIH or VIL; IO = -0.02 mA; VCC = 4.5 V 5
High Level Output Voltage, TTL Loads (25°C) VOH 3.98 V IO = -4 mA; VCC = 4.5 V 5
High Level Output Voltage, TTL Loads (-40°C to 85°C) VOH 3.84 V IO = -4 mA; VCC = 4.5 V 5
High Level Output Voltage, TTL Loads (-55°C to 125°C) VOH 3.7 V IO = -4 mA; VCC = 4.5 V 5
Low Level Output Voltage, CMOS Loads (all temperature ranges) VOL 0.1 V VI = VIH or VIL; IO = 0.02 mA; VCC = 4.5 V 5
Low Level Output Voltage, TTL Loads (25°C) VOL 0.26 V IO = 4 mA; VCC = 4.5 V 5
Low Level Output Voltage, TTL Loads (-40°C to 85°C) VOL 0.33 V IO = 4 mA; VCC = 4.5 V 5
Low Level Output Voltage, TTL Loads (-55°C to 125°C) VOL 0.4 V IO = 4 mA; VCC = 4.5 V 5
Input Leakage Current (25°C) II -0.1 0.1 µA VI = VCC and GND; IO = 0 mA; VCC = 5.5 V 5
Input Leakage Current (-40°C to 85°C) II -1 1 µA VI = VCC and GND; IO = 0 mA; VCC = 5.5 V 5
Input Leakage Current (-55°C to 125°C) II -1 1 µA VI = VCC and GND; IO = 0 mA; VCC = 5.5 V 5
Quiescent Device Current (25°C) ICC 8 µA VI = VCC or GND; IO = 0 mA; VCC = 5.5 V 5
Quiescent Device Current (-40°C to 85°C) ICC 80 µA VI = VCC or GND; IO = 0 mA; VCC = 5.5 V 5
Quiescent Device Current (-55°C to 125°C) ICC 160 µA VI = VCC or GND; IO = 0 mA; VCC = 5.5 V 5
Additional Quiescent Device Current per Input Pin (25°C) ΔICC 360 µA VI = VCC - 2.1 V; VCC 4.5 to 5.5 V 5
Additional Quiescent Device Current per Input Pin (-40°C to 85°C) ΔICC 450 µA VI = VCC - 2.1 V; VCC 4.5 to 5.5 V 5
Additional Quiescent Device Current per Input Pin (-55°C to 125°C) ΔICC 490 µA VI = VCC - 2.1 V; VCC 4.5 to 5.5 V 5
Input Pulse Width A (25°C) tWL 14 ns VCC = 4.5 V 6
Input Pulse Width A (-40°C to 85°C) tWL 18 ns VCC = 4.5 V 6
Input Pulse Width A (-55°C to 125°C) tWL 21 ns VCC = 4.5 V 6
Input Pulse Width B (25°C) tWH 14 ns VCC = 4.5 V 6
Input Pulse Width B (-40°C to 85°C) tWH 18 ns VCC = 4.5 V 6
Input Pulse Width B (-55°C to 125°C) tWH 21 ns VCC = 4.5 V 6
Input Pulse Width Reset (25°C) tWL 18 ns VCC = 4.5 V 6
Input Pulse Width Reset (-40°C to 85°C) tWL 23 ns VCC = 4.5 V 6
Input Pulse Width Reset (-55°C to 125°C) tWL 27 ns VCC = 4.5 V 6
Recovery Time R to A or B (all temperature ranges) tSU 0 ns VCC = 4.5 V 6
Output Pulse Width Q or Q (25°C) tW 630 770 µs CX = 0.1µF, RX = 10kΩ; VCC = 5 V 6
Output Pulse Width Q or Q (-40°C to 85°C) tW 602 798 µs CX = 0.1µF, RX = 10kΩ; VCC = 5 V 6
Output Pulse Width Q or Q (-55°C to 125°C) tW 595 805 µs CX = 0.1µF, RX = 10kΩ; VCC = 5 V 6
Pulse Width Match Between Circuits in the Same Package -2 2 % CX = 1000pF, RX = 10kΩ; VCC 4.5 to 5.5 V 7
Propagation Delay, Trigger A, B, R to Q, tPLH (25°C) tPLH 42 ns CL = 50pF; VCC = 4.5 V 7
Propagation Delay, Trigger A, B, R to Q, tPLH (-55°C to 125°C) tPLH 63 ns CL = 50pF; VCC = 4.5 V 7
Propagation Delay, Trigger A, B, R to Q, tPHL (25°C) tPHL 34 ns CL = 50pF; VCC = 4.5 V 7
Propagation Delay, Trigger A, B, R to Q, tPHL (-40°C to 85°C) tPHL 43 ns CL = 50pF; VCC = 4.5 V 7
Propagation Delay, Trigger A, B, R to Q, tPHL (-55°C to 125°C) tPHL 51 ns CL = 50pF; VCC = 4.5 V 7
Propagation Delay, R to Q, tPLH (25°C) tPLH 38 ns CL = 50pF; VCC = 4.5 V 7
Propagation Delay, R to Q, tPLH (-55°C to 125°C) tPLH 57 ns CL = 50pF; VCC = 4.5 V 7
Propagation Delay, R to Q, tPHL (25°C) tPHL 37 ns CL = 50pF; VCC = 4.5 V 7
Propagation Delay, R to Q, tPHL (-55°C to 125°C) tPHL 56 ns CL = 50pF; VCC = 4.5 V 7
Output Transition Time (25°C) tTLH, tTHL 15 ns CL = 50pF; VCC = 4.5 V 7
Output Transition Time (-40°C to 85°C) tTLH, tTHL 19 ns CL = 50pF; VCC = 4.5 V 7
Output Transition Time (-55°C to 125°C) tTLH, tTHL 22 ns CL = 50pF; VCC = 4.5 V 7
Input Capacitance (all temperature ranges) CIN 10 pF 7

CAD (KiCad official)

  • Symbol: CD74HCT221M96
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOIC-16 (KiCad packages3D, STEP)
  • 3D model files: cd74hct221m96-etched.step / cd74hct221m96-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cd74hct221m96.step / cd74hct221m96.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (28 pp, sha256 64abda1591a5b4b0, retrieved 2026-10-18, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF